Ling Li,

What was your load circuit when you ran this t= est?

I think you need to use the same load resistan= ce and voltage

in the simulation as the V_fixture and R_fixtu= re in the IBIS

model’s V-t tables in order to get no vi= sible changes in

the results. Note that there should be t= wo rising and two

falling waveforms in the [Model]. Usuall= y R_fixture is the

same for all, but the V_fixture is different.&= nbsp; Just pick one

of these and simulate the corresponding transi= tion (rise/fall)

and the simulation should reproduce the same w= aveform that is

in the V-t table of the [Model], and when you = change C_comp

in this scenario (within reasonable limits), y= ou should not

see any variations in the simulated waveforms.=

Thanks,

Arpad

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

From: owner-ib= is-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Ling Li Ong
Sent: Thursday, September 05, 2013 8:32 PM
To: Todd Westerhoff; ibis-users@eda.org
Subject: RE: [IBIS-Users] RE: Role of C_comp

Hi Todd,

Thanks for your email.= I think I’ve gotten the answer from your email. Good IBI= S model is really important.

As for my experiment a= fter trying the smaller time steps as suggested by Arpad, the waveform has = become smoother but yet, they are still not identical.

Regards,

Ling Li

From: owner-ibis-users@eda.org [<= a href=3D"mailto:owner-ibis-users@eda.org">mailto:owner-ibis-users@eda.org<= /a>] On Behalf Of Todd Westerhoff
Sent: Thursday, September 05, 2013 8:58 PM
To: ibis-users@eda.org
Subject: RE: [IBIS-Users] RE: Role of C_comp

Ling Li,

The V-T curves are gen= erated with c_comp present, so, in theory, the output waveforms should rema= in the same even if c_comp is changed.

Reality is not always = the same as theory, however. In some cases, you may see differences t= hat can be overcome by changing the simulator setup, as Arpad suggests.

But – and this i= s a big but – there are, and will always be, limits. The V-T waveform= s tell the simulator what the output behavior should be into a specified lo= ading condition, with c_comp included. The output driver has finite resistance, and a capacitance of c_comp, which forms a c= ircuit with an RC time constant. If you crank c_comp way up, say to 50pf, y= ou will describe a condition that is physically impossible. The RC ti= me constant of the output driver and c_comp will be large, while the switching time described by the V-T curves= will be small. There is no way for a simulator to resolve the confli= ct – one number or the other will win out.

Here’s my point = – an IBIS [model] contains matched sets of data that describe a buffe= r in multiple ways, with overlap and redundancy. If all of the data tells t= he same story [a well-constructed IBIS model], the correct simulation result is well-defined. If, however, different parts of= the model tell different stories, you get what you get. This is usually th= e result of a model having been modified or created by hand … when au= tomated tools are used to generate models, all the data is consistent. When models are edited manually, the result te= nds to reflect the user’s understanding of the spec, with that can pr= oduce different results in different tools.

… a long way of = saying, people should edit IBIS files with caution backed by understanding = of the spec. Just because a model works and produces a good result in one t= ool doesn’t mean it will work in another.

Todd.

Todd Westerhoff

VP, Software Products<= o:p>

Signal Integrity Softw= are Inc. • www.sisoft.com

6 Clock Tower Place&n= bsp;• Suite 250 • Maynard, MA 01754

(978) 461-0449 x24 &nb= sp;• twesterh@sisoft.com

= 220;I want to live= like that”

= &nb= sp; = &nb= sp; -Sidewalk Prophets

From: owner-ibis-users@eda.org [<= a href=3D"mailto:owner-ibis-users@eda.org">mailto:owner-ibis-users@eda.org<= /a>] On Behalf Of Ling Li Ong
Sent: Thursday, September 05, 2013 1:09 AM
To: Muranyi, Arpad; ibis-users= @eda.org
Cc: Siong Hee Lim
Subject: [IBIS-Users] RE: Role of C_comp

Hi Muranyi,=

Do you mean for an out= put buffer, if purely changing the c_comp value between 0.1pF and 50pF and = maintain other parameters as identical, it should not generate any differen= t waveforms?

I tried out the a simp= le output buffer simulation ran on HSPICE 2011.09-SP1. No transmissio= n line or termination impedance but mainly the ibis model. C_co= mp swept at 3.5pF (purple) and 5pf (green).

I observed the wavefor= ms are not overlapped. Is this the correct result from HSPICE? = If it is not, what will be the expected result?

Regards,

Ling Li

From: Muranyi,= Arpad [mailto:Arpad_Muranyi@me= ntor.com]
Sent: Thursday, September 05, 2013 11:48 AM
To: Ling Li Ong; ibis-users@ed= a.org
Cc: Siong Hee Lim
Subject: RE: Role of C_comp

Ling Li,

Regarding: “it has no difference between the simulation on C_comp 0.1pF and 50= pF”.

That’s correct (for the case when the bu= ffer model is driving), and

that’s the way HyperLynx 9.0 should also= behave.

Thanks,

Arpad

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D

From: Ling Li = Ong [mailto:llong@altera.com]
Sent: Wednesday, September 04, 2013 2:19 AM
To: Muranyi, Arpad; ibis-users= @eda.org
Cc: Siong Hee Lim
Subject: RE: Role of C_comp

Hi Arpad,

Thanks for your fast r= esponse. I was referring to the mentor’s website which commente= d with using the version 8.2.1, it has no difference between the simulation= on C_comp 0.1pF and 50pF.

This version may be ou= tdated compare to latest as I noticed the posting date was on last year.&nb= sp; However, I assume it should perform the same simulation result after th= is version.

http://communities.mentor.com/mgcx/thr= ead/6935

May I know is this com= ment align to your understanding?

Thanks.

Regards,

Ling Li

From: Muranyi,= Arpad [mailto:Arpad_Muranyi@me= ntor.com]
Sent: Wednesday, September 04, 2013 2:46 PM
To: Ling Li Ong; ibis-users@ed= a.org
Cc: Siong Hee Lim
Subject: RE: Role of C_comp

Ling Li,

It seems that your conclusion from reading Tod= d Westerhoff’s email

in the link you provided is not quite correct.= Todd seems to say

(correctly) that the output waveform of a driv= er will not change

when C_comp is changed in the IBIS [Model].&nb= sp; You should only see

differences in the waveforms when a reflection= hits the driver

and that reflection bounces back off of the dr= iver. This secondary

reflection from the driver should depend on th= e C_comp value.

Similarly, if an I/O buffer model is in the re= ceive mode (i.e. input

state), you should see different waveforms whe= n you change the C_comp

value.

As far as I can tell from my days when I worke= d at Intel and used

HSPICE in my work, HSPICE does what I describe= d above correctly.

Now that I work for Mentor, I can also tell yo= u that the results

of HyperLynx are correct the same way. I= am actually surprised to

hear that you see different results. Are= you sure your test case

is designed well to show and observe these eff= ects correctly?

By the way, the latest HyperLynx version is no= w 9.0 (not 8.2.1).

I hope this helps answering your question.

Thanks,

Arpad

From: owner-ibis-users@eda.org [<= a href=3D"mailto:owner-ibis-users@eda.org">mailto:owner-ibis-users@eda.org<= /a>] On Behalf Of Ling Li Ong
Sent: Wednesday, September 04, 2013 12:47 AM
To: ibis-users@eda.org
Cc: Siong Hee Lim
Subject: [IBIS-Users] Role of C_comp

Hi,

I saw some discussions on c_comp issue at user archi= ve at link:

http://www.eda.org/ibis/users_archive/0487.html

I am confused by the c_comp whether it is double-cou= nted and the different result obtained when using different tools.

According to the comment in the link above, varying = the c_comp may see the changes in rise/fall curve. This is definitely= true when using the HSPICE simulator. But, if you using the latest H= yperlynx version 8.2.1, changing the c_comp will not reflect the changes in rise/fall curve.

Can you please advise which tools are showing the co= rrect response on c_comp when sweeping at different value?

Thanks.

Regards,

Ling Li

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To All:

The I= BIS Open Forum is holding its third Asian IBIS Summit Meeting in=

Several companies listed below are co-sponsorin= g this major event

to be held at the Sherwood Hotel in Taipei. = Like in previous

years, We are planning for many attendees.

We encourage technical contributions from As= ia.

Other Asian IBIS Summit meetings are sch= eduled for:

Shanghai, P.R. China, Fri= day November 15, Parkyard Hotel

Yokohama, Japan, Friday,= November 22, Pacifico Yokohama

Lance Wang

IO Methodology

Bob Ross

Teraspeed Consulting Group

-------------= - ----------------------------------------------------------

&nbs= p; &= nbsp; ASIAN IBI= S SUMMIT (TAIPEI)

&n= bsp; = ; SECOND CALL FOR

---------------------------------------------------= - --------------------

= ; A S I A N I B I S&n= bsp; S U M M I T ( T A I P E I )

<= /o:p>

Time/Date: Tuesday, November 19, 2013, 8:00 AM to 4:30 PM=

= Meeting starts at 8:30 AM

Location: &n= bsp; Sherwood Hotel

&= nbsp; 11 Min Sheng E Road, Sec. 3

= ; Taipei, Taiwan=

= http://www.sherwood.com.tw/

Content: Presentations and Discus= sions

Purpose: Solicit and= exchange IBIS and interconnect model related

= ; information and ideas.

Co-sponsors (in alphabeti= cal order):

&nb= sp; Intel Corporation

= ; IO Methodology

<= p class=3DMsoPlainText> &nbs= p; Synopsys

Cost: &= nbsp; FREE, including refreshments and buffet lunch<= /span>

Vendors: Some vendors will have infor= mation tables outside the

&= nbsp; meeting room

&= nbsp; Contact u= s for details regarding sponsorship.

BACKGRO= UND

We have held many successfu= l Summit meetings across Asia in previous

ye= ars. This will be our third meeting in Taiwan where many national

and international high technology companies have oper= ations.

Our objective is to rea= ch out internationally to communicate with

the loc= al experts and to learn of regional concerns.

The confe= rence language is English, but we will plan for technical=

= ; translations in English and Chinese. So presenters can option= ally

deliver in Chinese as long as an English vers= ion of the material is

available.

IBIS SUMMIT

This= meeting will be conducted as a formal IBIS Summit Meeting.

&nb= sp; Presentations will be archived in an electronic format on our

Summits site, and minutes of the meeting will be issu= ed. However,

no formal decisions requiring v= otes will be planned.

CALL FOR PARTICIPANTS<= o:p>

People involved in IBIS and int= erconnect model development, EDA

tool development,= and digital circuit design are invited to

partici= pate in the Summit meeting. If you plan to participate,

&= nbsp; please register using the information below (in English):<= /o:p>

Name:<= /p>

= E-mail address:

&nb= sp; Company:

Top-level Web= Link:

Country:

Send to BOTH:

&nb= sp;

Lance Wang, IO Methodology &= nbsp; lwang@iometh.co= m

Bob Ross, Teraspeed Consulting Group= bob@teraspeed.com

= SIGNUP DEADLINE: November 15, 2013

CALL FOR = PRESENTATIONS

We are seeking pr= esentations from individuals who have IBIS and

int= erconnect modeling experiences or issues. If we have to

&= nbsp; select presentations for the number of time slots available, we=

will give preferential consideration to presentat= ions from Asia.

Presentation Fo= rmat: LCD Projection from meeting laptop computer

<= o:p>

Time: &nb= sp; 15-30 Minut= es including questions

Electron= ic Archival: All presentations will uploaded to our public=

&= nbsp; &nbs= p; IBIS Summit archives

E= lectronic Format: Power Point or Acrobat=

Presentation Booklet: Available at = the meeting for all attendees

P= resentation Deadline: October 15, 2013 to produce the presentation

= ; &n= bsp; copies for the meeting

If = you plan a presentation, please ADD to the above registration

&= nbsp; information:

= ; Title of Presentation:

&= nbsp; Estimated Time:

= ; (30 minutes or less)

We will = notify you of acceptance and may follow up with questions=

= ; when we form the program agenda.

&nb= sp; Note: Vendor promotional or business information is prohibited.

Presentations must be in English, although the deli= very can be in

Chinese.

Submissions from Taiwan and across Asia are strongly enco= uraged,

though submissions from other regions are = very welcome. Topics may

include behavioral = modeling of buffers, interconnects or other system

= components.

AGENDA

<= /o:p>

8:00 - 8:30 Vendor table setup and ta= bles

8:00 - 8:30 Sign in

8:30 - 12:00 Presentations<= /p>

= 12:00 - 13:30 Free buffet lunch, vendor tables

&nb= sp; 13:30 - 16:30 Presentations

presentations covering a range of issues f= rom existing customer

experiences, existing clarif= ications and some of the future

directions in IBIS= to deal with technical advances.

<= p class=3DMsoPlainText> &nbs= p; Several presentations on IBIS applications and behavioral modeling<= /o:p>

issues, including interconnects and system components, = are expected

from co-sponsor companies and/or thei= r customers.

LIST OF NEARBY HOTELS AND TRAVE= L

Hotels in all price ranges ca= n be found through internet searches.

The conferen= ce hotel link is

http://www.s= herwood.com.tw/

---------= - --------------------------------------------------------<= /p>

--<= o:p>

Bob Ross

Teraspeed Consulting Group, LCC

http://www.teraspeed.com

bob@ter= aspeeed.com

Direct : 503-246-8048

Teraspeed Labs: 971-279-5325<= /p>

Headquarters: 401-284-1827

Teraspeed is = a registered service mark of Teraspeed Consulting Group LLC

<= p class=3DMsoPlainText>

&n= bsp;