From owner-ibis  Mon Dec  2 16:49:07 1996
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From: awglaser@eos.ncsu.edu
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Subject: New version of s2ibis2
To: ibis-users@vhdl.org, ibis@vhdl.org
Date: Mon, 2 Dec 1996 19:37:57 -0500 (EST)
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IBISGurus:

The v1.0 release of s2ibis2 is now available. This version fixes many
bugs, and implements several new features. There are also new examples
of how to use the various commands.

The new version of s2ibis2 can be obtained via ftp at

    ftp://ftp.vhdl.org/pub/ibis/s2ibis/s2ibis2_v1.0

as well as 

    ftp://ftp.eos.ncsu.edu/pub/vlsi/techreports/s2ibis2.tar.Z

It can also be obtained using a Web browser at

    http://www2.ncsu.edu/eos/project/erl_html/erl_software.html#s2ibis2

(Click on "S2ibis2" to download.)

Questions and comments are welcome; send them to awglaser@eos.ncsu.edu.

Regards,

-- 
Alan Glaser                         "It's not a competition,
ECE Dept.                            it's just a mint..." - K
North Carolina State University

From owner-ibis  Tue Dec  3 08:31:51 1996
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From: Ajit Kulkarni <akulkarn@cisco.com>
Message-Id: <199612031620.IAA21990@stout.cisco.com>
Subject: Re: Use of s2ibis2 utility (fwd)
To: ibis-users@vhdl.org
Date: Tue, 3 Dec 1996 08:20:06 -0800 (PST)
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Hi,
   can you direct me to a right person who may be able to help us in
the process of generating IBIS models form s2ibis2 utility?
   Is there any newsgroup to discuss IBIS related issues?

thanks,

Ajit Kulkarni
-------------
Forwarded message:
> From mbs@eos.ncsu.edu Tue Dec  3 05:03:28 1996
> From: "Michael B Steer" <mbs@eos.ncsu.edu>
> Message-Id: <9612030803.ZM4790@eos.ncsu.edu>
> Date: Tue, 3 Dec 1996 08:03:22 -0500
> In-Reply-To: Ajit Kulkarni <akulkarn@cisco.com>
>         "Use of s2ibis2 utility" (Dec  2,  5:20pm)
> References: <2.2.32.19961203012057.006edff0@stout.cisco.com>
> X-Mailer: Z-Mail (3.2.1 10oct95)
> To: Ajit Kulkarni <akulkarn@cisco.com>, slipa@eos.ncsu.edu
> Subject: Re: Use of s2ibis2 utility
> Cc: mbs@ncsu.edu, paulf@ncsu.edu
> Mime-Version: 1.0
> Content-Type: text/plain; charset=us-ascii
> 
> Ajit,
> 
> It has been agreed by the IBIS community that we (NCSU) do not provide support
> for s2ibis.  All questions should be addressed to ibis-users@vhdl.org  This is
> the condition by which s2ibis is made available.  I hope that you understand
> that this work is done by us on our own time.  The exception to this is that
> Steve Lipa <slipa@eos.ncsu.edu> and Alan Glaser <awglaser@eps.ncsu.edu> are
> sometimes available to consult at a regular consulting fee.
> 
> Michael Steer
> On Dec 2,  5:20pm, Ajit Kulkarni wrote:ibis-users@vhdl.org
> > Subject: Use of s2ibis2 utility
> > Hi,
> >    I was planning to use the s2ibis2 utility to generate IBIS model for an
> > ASIC based on the sample files tryme.xxx that came with the tar file.
> >    However the pin definition part is not very clear to me and when I tried
> > a simple run to generate IBIS model from SPICE model for output driver I got
> > following messages before the run was abouted:-
> > s2ibis2:Strarting hspice job with input putthree.spi
> > s2ibis2:Data begin marker transfer not found in output file putthree.out
> >    These messages were repeated for punthree and puxthree.
> >    I would appreciate if you can point me to some more detailed information
> > about the command file or sample files and make suggestions based on the
> > status messages.
> >
> > thanks,
> >
> > Ajit Kulkarni
> > -------------
> > Cisco Systems
> >
> >-- End of excerpt from Ajit Kulkarni
> 
> 
> 
> -- 
> 
> =================================================
> Dr. Michael Steer,                      Professor
> Dept. of Electrical & Computer Engineering
> Daniels Hall, Room 335
> North Carolina State University
> Raleigh, NC 27695-7911
> phone 919-515-5191           fax:  919-515-5523
> email mbs@ncsu.edu
> url: http://www.ece.ncsu.edu/erl/faculty/mbs.html
> =================================================
> 


From owner-ibis  Wed Dec  4 13:40:40 1996
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Date: Wed, 4 Dec 96 13:30:44 PST
From: scotts@actel.com (Scott Schlachter)
Message-Id: <9612042130.AA00584@ricky.sun_net>
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Help: Programable outputs

Ibis folks,

I guess this question is mainly aimed at the simulation vendor folks, 
but feedback is welcome from everyone:
(Our products are programmable logic devices, for those who are not 
familiar with Actel)

For a component that has a programable behavior for the I/O pins, what 
might be the preferred way of presenting the data for the different 
possible configurations?  Specifically, let's say that a pin can be 
programmed to be either:
	1) Tristateable I/O with a fast slew rate
	2)  "		 "    "  " slow slew rate
	3) Open Drain output (data input to the output buffer is 
	        programmed to be tied to the enable of the buffer)

Would it be better to actually make a main IBIS file that contains all
of the I/Os in condition (1),  with 2 extra IBIS files that contain only 
one pin in them each for conditions (2) and (3)?  Or, perhaps only make 
one IBIS file with all of the pins configured in condition (1) and 
commented out sections for conditions (2) and (3).  Or, even another
possibility of dividing the I/Os into 3 equal sections, one for each 
configuration?  All comments/suggestions welcome, and please forgive me
if this has been discussed already.  Thanks,
-Scott Schlachter
 scotts@actel.com
 Actel Corporation
 Sunnyvale, CA.

From owner-ibis  Wed Dec  4 16:39:23 1996
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Date: Wed, 4 Dec 96 16:29:10 PST
From: huq@rockie.nsc.com (Syed Huq)
Message-Id: <9612050029.AA22056@rockie.nsc.com>
To: ibis@vhdl.org, ibis-users@vhdl.org, scotts@actel.com
Subject: Re: Help: Programable outputs

Scott,

I have a device with a programmble slew rate spec. Slew rate is controlled
by an external pin tied to a variable resistor. There are may ways to do this
until we see Arpad's BIRD30.2(Programmable Buffer)in IBIS3.0. So,we have to figure
work arounds til then.

I added ALL the possible buffer combinations in ONE IBIS model file. THen thru
the pin list, I comment out the model names I do not need to run. This manual 
commenting and uncommenting of model names need to be explained up on top 
under [Notes] for a customer to understand what to do.

Best Regards,
Syed.
National Semiconductor Corp.

> 
> For a component that has a programable behavior for the I/O pins, what 
> might be the preferred way of presenting the data for the different 
> possible configurations?  Specifically, let's say that a pin can be 
> programmed to be either:
> 	1) Tristateable I/O with a fast slew rate
> 	2)  "		 "    "  " slow slew rate
> 	3) Open Drain output (data input to the output buffer is 
> 	        programmed to be tied to the enable of the buffer)
> 
> Would it be better to actually make a main IBIS file that contains all
> of the I/Os in condition (1),  with 2 extra IBIS files that contain only 
> one pin in them each for conditions (2) and (3)?  Or, perhaps only make 
> one IBIS file with all of the pins configured in condition (1) and 
> commented out sections for conditions (2) and (3).  Or, even another
> possibility of dividing the I/Os into 3 equal sections, one for each 
> configuration?  All comments/suggestions welcome, and please forgive me
> if this has been discussed already.  Thanks,

From owner-ibis  Wed Dec  4 18:12:26 1996
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From: Arpad Muranyi <Arpad_Muranyi@ccm.fm.intel.com>
Message-ID: <Wed, 04 Dec 96 17:58:34 PST_17@ccm.fm.intel.com>
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Re: Help: Programable outputs


Text item: 

Scott,

BIRD30.2 addresses the problem you have.  Hopefully it will be implemented in 
IBIS3.0 soon.  Untill then, in our models we use comments.  Spceifically, I put 
everything that is legal in BIRD30.2 into the IBIS file with comment characters 
in front of each line.  This and an explanation gives enough information to the 
user to know how to edit the IBIS file for the various conditions.  When IBIS3.0
arrives, all they need to do is to rmove the comment characters.

Arpad
===============================================================================


Ibis folks,

I guess this question is mainly aimed at the simulation vendor folks,
but feedback is welcome from everyone:
(Our products are programmable logic devices, for those who are not
familiar with Actel)

For a component that has a programable behavior for the I/O pins, what
might be the preferred way of presenting the data for the different
possible configurations?  Specifically, let's say that a pin can be
programmed to be either:
     1) Tristateable I/O with a fast slew rate
     2)  "           "    "  " slow slew rate
     3) Open Drain output (data input to the output buffer is
             programmed to be tied to the enable of the buffer)

Would it be better to actually make a main IBIS file that contains all
of the I/Os in condition (1),  with 2 extra IBIS files that contain only
one pin in them each for conditions (2) and (3)?  Or, perhaps only make
one IBIS file with all of the pins configured in condition (1) and
commented out sections for conditions (2) and (3).  Or, even another
possibility of dividing the I/Os into 3 equal sections, one for each
configuration?  All comments/suggestions welcome, and please forgive me
if this has been discussed already.  Thanks,
-Scott Schlachter
 scotts@actel.com
 Actel Corporation
 Sunnyvale, CA.

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Subject: Help: Programable outputs
To: ibis@vhdl.org, ibis-users@vhdl.org
Message-Id: <9612042130.AA00584@ricky.sun_net>
From: scotts@actel.com (Scott Schlachter)
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From owner-ibis  Thu Dec  5 12:24:15 1996
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From: Arthur Wong <Arthur.Wong@idt.com>
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Date: Thu, 5 Dec 1996 12:13:04 -0800
Message-Id: <199612052013.MAA03100@pulsar.Eng.idt.com>
To: ibis-users@vhdl.org
Subject: Pin Name


To IBIS users,

I have a 2.1 IBIS model in which I specified under [Pin]
the pin name "gnd".  When I ran the golden parser
(ibis_chk, v2.1.11), I got this error message:

ERROR (line   34) - Illegal use of Reserved Word 'gnd'.


The spec only requires pin names be 5 char max.  Am I 
missing something?   Here's the complete line:

[Pin]  signal_name          model_name           R_pin     L_pin     C_pin
gnd    gnd                  GND

Regards,
Arthur Wong
IDT
arthur@idt.com

From owner-ibis  Thu Dec  5 12:41:07 1996
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Date: Thu, 5 Dec 96 12:31:01 PST
From: huq@rockie.nsc.com (Syed Huq)
Message-Id: <9612052031.AA16005@rockie.nsc.com>
To: ibis-users@vhdl.org, Arthur.Wong@idt.com
Subject: Re: Pin Name

Arthur,

POWER,GND,gnd,power are reserved keywords and cannot be used.

If you name it 'gnd1' it's ok but not 'gnd'.

Regards,
Syed.
National Semiconductor Corp.
> From owner-ibis@vhdl.vhdl.org Thu Dec  5 12:22:00 1996
> From: Arthur Wong <Arthur.Wong@idt.com>
> Date: Thu, 5 Dec 1996 12:13:04 -0800
> To: ibis-users@vhdl.org
> Subject: Pin Name
> Content-Length: 481
> 
> 
> To IBIS users,
> 
> I have a 2.1 IBIS model in which I specified under [Pin]
> the pin name "gnd".  When I ran the golden parser
> (ibis_chk, v2.1.11), I got this error message:
> 
> ERROR (line   34) - Illegal use of Reserved Word 'gnd'.
> 
> 
> The spec only requires pin names be 5 char max.  Am I 
> missing something?   Here's the complete line:
> 
> [Pin]  signal_name          model_name           R_pin     L_pin     C_pin
> gnd    gnd                  GND
> 
> Regards,
> Arthur Wong
> IDT
> arthur@idt.com
> 

From owner-ibis  Thu Dec  5 13:14:57 1996
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Date: Thu, 5 Dec 96 13:05 PST
From: bob@icx.com ( Bob Ross)
To: arthur.wong@idt.com, huq@rockie.nsc.com, ibis-users@vhdl.org
Subject: Forwarded: Re:  Pin Name

(forwarded with change since I mistyped the reflector address)

Arthur, Syed:

I just checked this and it looks like you have dicovered an ibis_chk and
ibischk2 bug that has been in existance from day one.

It seems that if a pin "number" takes on the name of any of the reserved
words (gnd, power, nc na) it reports an error.  This is not correct.

Thank you Arthur for finding this.

Syed's comments is correct for a workaround.  However, I do not believe
it was the intention that these could not be used for pin numbers or
signal_name entries.  (They work for signal_name).


Bob Ross
Inteconnectix


> From: Arthur Wong <Arthur.Wong@idt.com>
> Received: (arthur@localhost) by pulsar.Eng.idt.com (8.6.12/8.6.12) id MAA03100 for ibis-users@vhdl.org; Thu, 5 Dec 1996 12:13:04 -0800
> Date: Thu, 5 Dec 1996 12:13:04 -0800
> Message-Id: <199612052013.MAA03100@pulsar.Eng.idt.com>
> To: ibis-users@vhdl.org
> Subject: Pin Name
> Status: R


> To IBIS users,

> I have a 2.1 IBIS model in which I specified under [Pin]
> the pin name "gnd".  When I ran the golden parser
> (ibis_chk, v2.1.11), I got this error message:

> ERROR (line   34) - Illegal use of Reserved Word 'gnd'.


> The spec only requires pin names be 5 char max.  Am I 
> missing something?   Here's the complete line:

> [Pin]  signal_name          model_name           R_pin     L_pin     C_pin
> gnd    gnd                  GND

> Regards,
> Arthur Wong
> IDT
> arthur@idt.com


From owner-ibis  Thu Dec  5 17:45:16 1996
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Date: Thu, 5 Dec 96 16:59:01 PST
From: zheng@symmetry.com (Zheng SHI)
Message-Id: <9612060059.AA15758@ symmetry.com>
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Questions of Polarity and Enable

Hi, Ibis folks:

Can anyone tell me what the sub-param Polarity and Enable of 
keyword [Model] really means? Is Polarity used only on diff 
pins? Is Enable used only on tri-state pins? How can I decide 
the Polarity and Enable of an input or output pin?

I can't find such detail information from IBIS2.1 Specification, 
can anyone give me some advices, or tell me where i can find 
the answer?

Thanks a lot,

-Zheng Shi
 zheng@symmetry.com
 Los Altos, CA. 

From owner-ibis  Fri Dec  6 15:20:28 1996
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From: huq@rockie.nsc.com (Syed Huq)
Message-Id: <9612062310.AA18011@rockie.nsc.com>
To: ibis@vhdl.org, ibis-users@vhdl.org, sjpeters@ichips.intel.com
Subject: Re: Questions of Polarity and Enable

Hi,

If you are creating an IBIS model based on s2ibis utility, Polarity
and Enable are key in making the conversion work. 

For Model_type Input, Polarity=1 sets the input for inverting while
Polarity=0 for non-inverting.

For Model_type I/O or 3-state, both Polarity and Enable fields are
expected. Enable specifies the pin number that enables the associated
output.

Regards,
Syed
National Semiconductor Corp.

> 
> 
> On  Thu, 5 Dec 96 16:59:01 PST Zheng Shi of Symmetry wrote:
> 
> >Hi, Ibis folks:
> >
> >Can anyone tell me what the sub-param Polarity and Enable of 
> >keyword [Model] really means? Is Polarity used only on diff 
> >pins? Is Enable used only on tri-state pins? How can I decide 
> >the Polarity and Enable of an input or output pin?
> >
> >I can't find such detail information from IBIS2.1 Specification, 
> >can anyone give me some advices, or tell me where i can find 
> >the answer?
> >
> >Thanks a lot,
> >
> >-Zheng Shi
> > zheng@symmetry.com
> > Los Altos, CA. 
> 
>      I belive the original intent was to support SSI logic components
> (74OO series TTL and the like) by allowing the user to include
> information on the outputs' logic operation. For example, the model provider
> could specify if the the path from input to output was inverting or 
> non-inverting or if the enable on a tri-state output pin was high or
> low.  However, for a lot of components (microprocessors, PALS/FPGAS, RAMS,
> etc.) these parameters don't seem to make much sense (to me, anyway). Unless
> you were modeling an SSI component where this made since, I would
> just default them to positive polarity and Active_high.
> 
>   Ibis old-timmers, any other comments?
> 
>                Best Regards,
>                Stephen Peters
>                Intel Corp.
> 
> 

From owner-ibis  Fri Dec  6 14:42:44 1996
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Message-Id: <199612062229.OAA11827@ichips.intel.com>
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Questions of Polarity and Enable
Date: Fri, 06 Dec 1996 14:31:33 -0800
From: Stephen Peters <sjpeters@ichips.intel.com>


On  Thu, 5 Dec 96 16:59:01 PST Zheng Shi of Symmetry wrote:

>Hi, Ibis folks:
>
>Can anyone tell me what the sub-param Polarity and Enable of 
>keyword [Model] really means? Is Polarity used only on diff 
>pins? Is Enable used only on tri-state pins? How can I decide 
>the Polarity and Enable of an input or output pin?
>
>I can't find such detail information from IBIS2.1 Specification, 
>can anyone give me some advices, or tell me where i can find 
>the answer?
>
>Thanks a lot,
>
>-Zheng Shi
> zheng@symmetry.com
> Los Altos, CA. 

     I belive the original intent was to support SSI logic components
(74OO series TTL and the like) by allowing the user to include
information on the outputs' logic operation. For example, the model provider
could specify if the the path from input to output was inverting or 
non-inverting or if the enable on a tri-state output pin was high or
low.  However, for a lot of components (microprocessors, PALS/FPGAS, RAMS,
etc.) these parameters don't seem to make much sense (to me, anyway). Unless
you were modeling an SSI component where this made since, I would
just default them to positive polarity and Active_high.

  Ibis old-timmers, any other comments?

               Best Regards,
               Stephen Peters
               Intel Corp.


From owner-ibis  Fri Dec  6 16:41:52 1996
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Date: Fri, 06 Dec 96 15:44:00 PST
From: Arpad Muranyi <Arpad_Muranyi@ccm.fm.intel.com>
Message-ID: <Fri, 06 Dec 96 16:28:08 PST_7@ccm.fm.intel.com>
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Re: Questions of Polarity and Enable


Text item: 

Stephen, and Zheng,

If the use of the Polarity (and other) sub-parameter doesn't make sense, don't 
use it.  It is not a required sub-parameter.

Arpad
===============================================================================

On  Thu, 5 Dec 96 16:59:01 PST Zheng Shi of Symmetry wrote:

>Hi, Ibis folks:
>
>Can anyone tell me what the sub-param Polarity and Enable of
>keyword [Model] really means? Is Polarity used only on diff
>pins? Is Enable used only on tri-state pins? How can I decide
>the Polarity and Enable of an input or output pin?
>
>I can't find such detail information from IBIS2.1 Specification,
>can anyone give me some advices, or tell me where i can find
>the answer?
>
>Thanks a lot,
>
>-Zheng Shi
> zheng@symmetry.com
> Los Altos, CA.

     I belive the original intent was to support SSI logic components
(74OO series TTL and the like) by allowing the user to include
information on the outputs' logic operation. For example, the model provider
could specify if the the path from input to output was inverting or
non-inverting or if the enable on a tri-state output pin was high or
low.  However, for a lot of components (microprocessors, PALS/FPGAS, RAMS,
etc.) these parameters don't seem to make much sense (to me, anyway). Unless
you were modeling an SSI component where this made since, I would
just default them to positive polarity and Active_high.

  Ibis old-timmers, any other comments?

               Best Regards,
               Stephen Peters
               Intel Corp.

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From: Stephen Peters <sjpeters@ichips.intel.com>
Date: Fri, 06 Dec 1996 14:31:33 -0800
Subject: Questions of Polarity and Enable
To: ibis@vhdl.org, ibis-users@vhdl.org
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Date: Fri, 06 Dec 96 15:47:00 PST
From: Arpad Muranyi <Arpad_Muranyi@ccm.fm.intel.com>
Message-ID: <Fri, 06 Dec 96 16:28:08 PST_18@ccm.fm.intel.com>
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Re[2]: Questions of Polarity and Enable


Text item: 

Syed,

Again, these sub-parameters are not required in IBIS.  They may be used in the 
s2ibis conversion tool, but IBIS doesn't require them, so people don't have to 
use them if it doesn't make sense for them.

Arpad
==============================================================================

Hi,

If you are creating an IBIS model based on s2ibis utility, Polarity
and Enable are key in making the conversion work.

For Model_type Input, Polarity=1 sets the input for inverting while
Polarity=0 for non-inverting.

For Model_type I/O or 3-state, both Polarity and Enable fields are
expected. Enable specifies the pin number that enables the associated
output.

Regards,
Syed
National Semiconductor Corp.

>
>
> On  Thu, 5 Dec 96 16:59:01 PST Zheng Shi of Symmetry wrote:
>
> >Hi, Ibis folks:
> >
> >Can anyone tell me what the sub-param Polarity and Enable of
> >keyword [Model] really means? Is Polarity used only on diff
> >pins? Is Enable used only on tri-state pins? How can I decide
> >the Polarity and Enable of an input or output pin?
> >
> >I can't find such detail information from IBIS2.1 Specification,
> >can anyone give me some advices, or tell me where i can find
> >the answer?
> >
> >Thanks a lot,
> >
> >-Zheng Shi
> > zheng@symmetry.com
> > Los Altos, CA.
>
>      I belive the original intent was to support SSI logic components
> (74OO series TTL and the like) by allowing the user to include
> information on the outputs' logic operation. For example, the model provider
> could specify if the the path from input to output was inverting or
> non-inverting or if the enable on a tri-state output pin was high or
> low.  However, for a lot of components (microprocessors, PALS/FPGAS, RAMS,
> etc.) these parameters don't seem to make much sense (to me, anyway). Unless
> you were modeling an SSI component where this made since, I would
> just default them to positive polarity and Active_high.
>
>   Ibis old-timmers, any other comments?
>
>                Best Regards,
>                Stephen Peters
>                Intel Corp.
>
>

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Subject: Re: Questions of Polarity and Enable
To: ibis@vhdl.org, ibis-users@vhdl.org, sjpeters@ichips.intel.com
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Date: Sat,  7 Dec 1996 08:24:50, -0500
To: ibis@vhdl.org, ibis-users@vhdl.org
cc: cottrell@cfi.org, john_beatty@vnet.ibm.com
Date: 07 Dec 96
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Re: Help: Programmable Outputs
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-- [ From: Ron Christopher * EMC.Ver #2.5.1 ] --

It seems like the proposed BIRD will have the user manually edit the
IBIS model for each different condition.  The IBIS model is in the
category of rules data when processing at the higher level package. 
Would you require each user to have their own copy of the IBIS model in
an MCM or board design shop?  Can this proposal support a user who needs
the IBIS model set  one way for one net and a different way for a
different net in the same higher level package being processed?

Would a standardized filter identifier associated with the pin in the
design data base improve the proposal?  The filter identifier would
identify to the programs which subset of the IBIS model to use for each
instance of a pin.  The standardized identifier can then be used by
other functions such as system level delay or tristate rules checking
etc. One could perhaps write a checker that checked that the
standardized identifier was correct for the conditions which might
require tracing a couple of levels of logic through the network.

Ron Christopher 

==================

Text item: 

Scott,

BIRD30.2 addresses the problem you have.  Hopefully it will be
implemented in  IBIS3.0 soon.  Untill then, in our models we use
comments.  Spceifically, I put  everything that is legal in BIRD30.2
into the IBIS file with comment characters  in front of each line.  This
and an explanation gives enough information to the  user to know how to
edit the IBIS file for the various conditions.  When IBIS3.0 arrives,
all they need to do is to rmove the comment characters.

Arpad
========================================================================
=======


Ibis folks,

I guess this question is mainly aimed at the simulation vendor folks,
but feedback is welcome from everyone:
(Our products are programmable logic devices, for those who are not
familiar with Actel)

For a component that has a programable behavior for the I/O pins, what
might be the preferred way of presenting the data for the different
possible configurations?  Specifically, let's say that a pin can be
programmed to be either:
     1) Tristateable I/O with a fast slew rate
     2)  "           "    "  " slow slew rate
     3) Open Drain output (data input to the output buffer is
             programmed to be tied to the enable of the buffer)

Would it be better to actually make a main IBIS file that contains all
of the I/Os in condition (1),  with 2 extra IBIS files that contain only
one pin in them each for conditions (2) and (3)?  Or, perhaps only make
one IBIS file with all of the pins configured in condition (1) and
commented out sections for conditions (2) and (3).  Or, even another
possibility of dividing the I/Os into 3 equal sections, one for each
configuration?  All comments/suggestions welcome, and please forgive me
if this has been discussed already.  Thanks,
-Scott Schlachter
 scotts@actel.com
 Actel Corporation
 Sunnyvale, CA.

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Subject: Help: Programable outputs
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Message-Id: <9612042130.AA00584@ricky.sun_net>
From: scotts@actel.com (Scott Schlachter)
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From owner-ibis  Mon Dec  9 07:47:35 1996
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From: scotts@actel.com (Scott Schlachter)
Message-Id: <9612091537.AA01865@ricky.sun_net>
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Re: Re[2]: Questions of Polarity and Enable

Please disregard my last email.  I just realized that these parameters are
not actually required.  My appologies,
-Scott
 
> Syed,
> 
> Again, these sub-parameters are not required in IBIS.  They may be used in the 
> s2ibis conversion tool, but IBIS doesn't require them, so people don't have to 
> use them if it doesn't make sense for them.
> 
> Arpad
> ==============================================================================
 

From owner-ibis  Mon Dec  9 07:59:22 1996
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From: Arpad Muranyi <Arpad_Muranyi@ccm.fm.intel.com>
Message-ID: <Mon, 09 Dec 96 07:45:39 PST_2@ccm.fm.intel.com>
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Re[2]: Questions of Polarity and Enable


Text item: 

Scott,

It seems to me that my respnse didn't make it through the reflector.  The 
sub-parameters Enable and Polarity are NOT required in an IBIS model according 
to the spec.  So I don't understand what all the fuss is about this.  If you 
don't need it, don't use it...

Arpad
==============================================================================

Good morning IBIS world,

The nessessity of having Enable and Polarity specified for the s2ibis
utilities is clear to me.  However, I too was wondering why they are
required in the specs.  It almost seems like unnesessary data to
require to be listed for all of the types of pins.  It SHOULD be required
to specify the enable pin, IF the enable for an I/O is an external pin
itself; such with, it should also have its (the enable pin's) polarity
specified.  But, if the enable is only available internally, why specify
it?  And, if it is not specifically an external enable pin, why does the
pin's polarity matter to the simulation tools?  Thanks,

-Scott Schlachter     Actel Corporation
 scotts@actel.com     Sunnyvale, CA

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Subject: Re: Questions of Polarity and Enable
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From: scotts@actel.com (Scott Schlachter)
Message-Id: <9612091520.AA01859@ricky.sun_net>
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Re: Questions of Polarity and Enable

Good morning IBIS world,

The nessessity of having Enable and Polarity specified for the s2ibis 
utilities is clear to me.  However, I too was wondering why they are
required in the specs.  It almost seems like unnesessary data to 
require to be listed for all of the types of pins.  It SHOULD be required
to specify the enable pin, IF the enable for an I/O is an external pin 
itself; such with, it should also have its (the enable pin's) polarity
specified.  But, if the enable is only available internally, why specify 
it?  And, if it is not specifically an external enable pin, why does the 
pin's polarity matter to the simulation tools?  Thanks,

-Scott Schlachter	Actel Corporation
 scotts@actel.com	Sunnyvale, CA

> Hi,
> 
> If you are creating an IBIS model based on s2ibis utility, Polarity
> and Enable are key in making the conversion work. 
> 
> For Model_type Input, Polarity=1 sets the input for inverting while
> Polarity=0 for non-inverting.
> 
> For Model_type I/O or 3-state, both Polarity and Enable fields are
> expected. Enable specifies the pin number that enables the associated
> output.
> 
> Regards,
> Syed
> National Semiconductor Corp.
> 
> > 
> > 
> > On  Thu, 5 Dec 96 16:59:01 PST Zheng Shi of Symmetry wrote:
> > 
> > >Hi, Ibis folks:
> > >
> > >Can anyone tell me what the sub-param Polarity and Enable of 
> > >keyword [Model] really means? Is Polarity used only on diff 
> > >pins? Is Enable used only on tri-state pins? How can I decide 
> > >the Polarity and Enable of an input or output pin?
> > >
> > >I can't find such detail information from IBIS2.1 Specification, 
> > >can anyone give me some advices, or tell me where i can find 
> > >the answer?
> > >
> > >Thanks a lot,
> > >
> > >-Zheng Shi
> > > zheng@symmetry.com
> > > Los Altos, CA. 
> > 
> >      I belive the original intent was to support SSI logic components
> > (74OO series TTL and the like) by allowing the user to include
> > information on the outputs' logic operation. For example, the model provider
> > could specify if the the path from input to output was inverting or 
> > non-inverting or if the enable on a tri-state output pin was high or
> > low.  However, for a lot of components (microprocessors, PALS/FPGAS, RAMS,
> > etc.) these parameters don't seem to make much sense (to me, anyway). Unless
> > you were modeling an SSI component where this made since, I would
> > just default them to positive polarity and Active_high.
> > 
> >   Ibis old-timmers, any other comments?
> > 
> >                Best Regards,
> >                Stephen Peters
> >                Intel Corp.
> > 
> > 
> 

From owner-ibis  Tue Dec 10 10:36:39 1996
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Date: Tue, 10 Dec 96 08:12:00 PST
From: Arpad Muranyi <Arpad_Muranyi@ccm.fm.intel.com>
Message-ID: <Tue, 10 Dec 96 10:22:33 PST_10@ccm.fm.intel.com>
To: ibis@vhdl.org, ibis-users@vhdl.org
cc: cottrell@cfi.org, john_beatty@vnet.ibm.com
Subject: Re[2]: Help: Programmable Outputs


Text item: 

Ron,

First, the proposed bird (30.2) does not require any manual edits by the user.  
The whole point was to provide a mechanizm that the simulation software would be
able to use in a user friendly interface or dialog box, etc.  Through this the 
user would not have to edit the IBIS model, the user will have to make 
selections in the simulation software.  If no selections are made, the default 
will be in effect, but the software will still be able to simulate.


Second, you are using some kind of a software jargon in your suggestion that I 
don't understand ("standardized filter identifier").  Since I don't understand, 
I cant comment on it.  Would you care to elaborate a little more?

Arpad
===============================================================================

-- [ From: Ron Christopher * EMC.Ver #2.5.1 ] --

It seems like the proposed BIRD will have the user manually edit the
IBIS model for each different condition.  The IBIS model is in the
category of rules data when processing at the higher level package.
Would you require each user to have their own copy of the IBIS model in
an MCM or board design shop?  Can this proposal support a user who needs
the IBIS model set  one way for one net and a different way for a
different net in the same higher level package being processed?

Would a standardized filter identifier associated with the pin in the
design data base improve the proposal?  The filter identifier would
identify to the programs which subset of the IBIS model to use for each
instance of a pin.  The standardized identifier can then be used by
other functions such as system level delay or tristate rules checking
etc. One could perhaps write a checker that checked that the
standardized identifier was correct for the conditions which might
require tracing a couple of levels of logic through the network.

Ron Christopher

==================

Text item: 

Scott,

BIRD30.2 addresses the problem you have.  Hopefully it will be
implemented in  IBIS3.0 soon.  Untill then, in our models we use
comments.  Spceifically, I put  everything that is legal in BIRD30.2
into the IBIS file with comment characters  in front of each line.  This
and an explanation gives enough information to the  user to know how to
edit the IBIS file for the various conditions.  When IBIS3.0 arrives,
all they need to do is to rmove the comment characters.

Arpad
========================================================================
=======


Ibis folks,

I guess this question is mainly aimed at the simulation vendor folks,
but feedback is welcome from everyone:
(Our products are programmable logic devices, for those who are not
familiar with Actel)

For a component that has a programable behavior for the I/O pins, what
might be the preferred way of presenting the data for the different
possible configurations?  Specifically, let's say that a pin can be
programmed to be either:
     1) Tristateable I/O with a fast slew rate
     2)  "           "    "  " slow slew rate
     3) Open Drain output (data input to the output buffer is
             programmed to be tied to the enable of the buffer)

Would it be better to actually make a main IBIS file that contains all
of the I/Os in condition (1),  with 2 extra IBIS files that contain only
one pin in them each for conditions (2) and (3)?  Or, perhaps only make
one IBIS file with all of the pins configured in condition (1) and
commented out sections for conditions (2) and (3).  Or, even another
possibility of dividing the I/Os into 3 equal sections, one for each
configuration?  All comments/suggestions welcome, and please forgive me
if this has been discussed already.  Thanks,
-Scott Schlachter
 scotts@actel.com
 Actel Corporation
 Sunnyvale, CA.

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Subject: Help: Programable outputs
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Subject: Re: Help: Programmable Outputs
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Date: 07 Dec 96
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To: ibis@vhdl.org, ibis-users@vhdl.org
Date: Sat,  7 Dec 1996 08:24:50, -0500
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From owner-ibis  Wed Dec 11 18:27:56 1996
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Date: Wed, 11 Dec 96 17:38:53 PST
From: zheng@symmetry.com (Zheng SHI)
Message-Id: <9612120138.AA25809@ symmetry.com>
To: ibis@vhdl.org, ibis-users@vhdl.org
Subject: Package Model?

Hi, Ibis folks:

Thank you all for reading and answering my last question 
about Polarity and Enable sub-param. This time I met another 
problem, an I/O pin has a package model as below:

 INT------ o----/\/\/\----o----/\/\/\----o------ EXT
           |              |              |
           o----@@@@@@@---o----@@@@@@@---o
           |              |              |
           |              |              |
          ===            ===            ===
           |              |              |
           |              |              |
          GND            GND            GND

It doesn't fit the default ibis package model, so I can't 
choose the R_pkg, L_pkg and C_pkg. Still, I can't find 
ways using [Define Package Model] to deal with it.

Can anyone give me a help? Thanks a lot,

-Zheng Shi
 zheng@symmetry.com
 Los Altos, CA.

