From owner-ibis  Wed Nov  5 08:55:03 1997
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Date: Wed, 5 Nov 1997 08:52:54 -0800 (PST)
From: bob@icx.com (Bob Ross)
To: ibis-users@eda.org, zarir@lsil.com
Subject: Re:  IBIS simulation help

Zarir:

Many companies provide EDA tools which use IBIS models for 
simulation.  Review the Poster and IBIS Roster Listing sections
of the EIA IBIS Web Site to get you started:

  http://www.eia.org/eig/ibis/ibis.htm

Simulators read the IBIS models and use them directly or
convert them into other formats for electrical simulation.

Best Regards,
Bob Ross
Interconnectix


> Date: Wed, 5 Nov 1997 15:20:36 +0531
> From: zarir@lsil.com (Zarir_Sarkari)
> Message-Id: <199711050949.PAA15508@akola>
> To: ibis-info@vhdl.org
> Subject: IBIS simulation help



> Hi :

> Can someone please educate me as to which EDA tools and vendors
> support IBIS simulation ? How do I go about using IBIS models ?

> Thank you,
> Zarir


 
From owner-ibis  Fri Nov 14 08:55:11 1997
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From: Paul Gregory <pgregory@hpbs2933.boi.hp.com>
Message-Id: <9711141650.AA20500@hpbs2933.boi.hp.com>
Subject: typ outside min,max
To: ibis-users@vhdl.org
Date: Fri, 14 Nov 97 9:50:41 MST
Cc: pgregory@boi.hp.com (Paul Gregory)
Mailer: Elm [revision: 70.85]

At first I thought this was a bug, that is to say, a 
defect in the IBIS models I had.  But now that I look
closer, it seems to be more prevalent than I would
have thought possible for a "bug".   Maybe it is
a feature. :)

What I have found is that "typ" data is outside the "min"
and "max" values. 

Consider this model fragment (greatly reduced for brevity) 
provided by a prominent silicon supplier:


[Pulldown]
|Voltage          I(typ)          I(min)          I(max)
|  [lines deleted for brevity]
-1.00E+00	-3.22E-02	-1.96E-02	-2.18E-02
-9.00E-01	-2.96E-02	-1.50E-02	-1.91E-02
-8.00E-01	-2.73E-02	-1.12E-02	-1.66E-02
-7.00E-01	-2.50E-02	-8.54E-03	-1.46E-02
-6.00E-01	-2.26E-02	-6.72E-03	-1.28E-02
-5.00E-01	-2.02E-02	-5.41E-03	-1.09E-02
-4.00E-01	-1.77E-02	-4.39E-03	-9.05E-03
-3.00E-01	-1.51E-02	-3.40E-03	-7.20E-03
-2.00E-01	-1.26E-02	-2.42E-03	-5.37E-03
-1.00E-01	-1.01E-02	-1.44E-03	-3.55E-03
0.00E+00	-4.67E-03	-4.60E-04	-1.43E-03
1.00E-01	1.82E-02	4.97E-04	1.33E-02  | typ out of range of min/max
2.00E-01	5.53E-02	1.43E-03	5.37E-02  | typ out of range of min/max
3.00E-01	9.70E-02	3.27E-03	9.92E-02
4.00E-01	1.41E-01	2.23E-02	1.44E-01
5.00E-01	1.85E-01	6.56E-02	1.95E-01
6.00E-01	2.29E-01	9.21E-02	2.50E-01
7.00E-01	2.72E-01	1.03E-01	3.01E-01
8.00E-01	3.12E-01	1.07E-01	3.49E-01
|  [lines deleted for brevity]

I expected that min and max represent the extremes of the
device behavior.  It seems that in some cases, it is not.
Should this be expected?  How is it explained?  

Should the model be changed to put the "extreme" value 
into the appropriate min or max column?

This does not seem to be a singular case either, I have 
observed this problem in more than 30 models from at 
least 6 suppliers.

Your comments?

 -- Paul Gregory

   phone: (208) 396-5086               USmail: Hewlett-Packard
     fax: (208) 396-4122                       M/S 143
   email: paul_gregory@hp.com                  11311 Chinden Blvd.
                                               Boise, ID  83714
 
From owner-ibis  Fri Nov 14 10:38:35 1997
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From: Chris Rokusek <crokusek@qdt.com>
Organization: Quad Design Technology
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To: Paul Gregory <pgregory@hpbs2933.boi.hp.com>
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Subject: Re: typ outside min,max
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Paul,

Without first de-referencing each Pullup/Pulldown and each Power
Clamp/GND Clamp from its "Reference voltage" and then summing them
together appropriately I don't think a check is possible.  For example,
it is possible (although perhaps not desirable) that a max and min
Pullup curve use the same Voltage reference value (i.e. 5V) however the
zero current crossing point on the voltage axis when looking at the raw
curves (w/o de-referencing) differs by .5V.  Or maybe the curves are
EXACTLY the same with just different reference voltages.  A single
Pullup/Pulldown curve cannot be looked at in isolation unless the shunts
curve currents are 0.

Its also not clear to me that the shunt regions of the pullup/pulldown
will follow min < typ < max rule (even if absolute values are used)--SEE
YOUR EXAMPLE for voltages < 0v.  I expect that after the shunts were
added back in to your example it might be somewhat clearer.

My first impulse is that even if the curves are added appropriately I
would expect many exceptions to occur--esp. near the 0-current crossing
points and in the shunt regions.  Possible in the middle of the
operating range a single check might work most of the time.

Chris Rokusek
Viewlogic ADG
 
From owner-ibis  Fri Nov 14 12:09:30 1997
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From: Fred Balistreri <fred@apsimtech.com>
Organization: Apsim
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CC: ibis-users@vhdl.org, Paul Gregory <pgregory@boi.hp.com>
Subject: Re: typ outside min,max
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Paul Gregory wrote:
> 
> At first I thought this was a bug, that is to say, a
> defect in the IBIS models I had.  But now that I look
> closer, it seems to be more prevalent than I would
> have thought possible for a "bug".   Maybe it is
> a feature. :)
> 
> What I have found is that "typ" data is outside the "min"
> and "max" values.
> 
> Consider this model fragment (greatly reduced for brevity)
> provided by a prominent silicon supplier:
> 
> [Pulldown]
> |Voltage          I(typ)          I(min)          I(max)
> |  [lines deleted for brevity]
> -1.00E+00       -3.22E-02       -1.96E-02       -2.18E-02
> -9.00E-01       -2.96E-02       -1.50E-02       -1.91E-02
> -8.00E-01       -2.73E-02       -1.12E-02       -1.66E-02
> -7.00E-01       -2.50E-02       -8.54E-03       -1.46E-02
> -6.00E-01       -2.26E-02       -6.72E-03       -1.28E-02
> -5.00E-01       -2.02E-02       -5.41E-03       -1.09E-02
> -4.00E-01       -1.77E-02       -4.39E-03       -9.05E-03
> -3.00E-01       -1.51E-02       -3.40E-03       -7.20E-03
> -2.00E-01       -1.26E-02       -2.42E-03       -5.37E-03
> -1.00E-01       -1.01E-02       -1.44E-03       -3.55E-03
> 0.00E+00        -4.67E-03       -4.60E-04       -1.43E-03
> 1.00E-01        1.82E-02        4.97E-04        1.33E-02  | typ out of range of min/max
> 2.00E-01        5.53E-02        1.43E-03        5.37E-02  | typ out of range of min/max
> 3.00E-01        9.70E-02        3.27E-03        9.92E-02
> 4.00E-01        1.41E-01        2.23E-02        1.44E-01
> 5.00E-01        1.85E-01        6.56E-02        1.95E-01
> 6.00E-01        2.29E-01        9.21E-02        2.50E-01
> 7.00E-01        2.72E-01        1.03E-01        3.01E-01
> 8.00E-01        3.12E-01        1.07E-01        3.49E-01
> |  [lines deleted for brevity]
> 
> I expected that min and max represent the extremes of the
> device behavior.  It seems that in some cases, it is not.
> Should this be expected?  How is it explained?
> 
> Should the model be changed to put the "extreme" value
> into the appropriate min or max column?
> 
> This does not seem to be a singular case either, I have
> observed this problem in more than 30 models from at
> least 6 suppliers.
> 
> Your comments?
> 
>  -- Paul Gregory
> 
>    phone: (208) 396-5086               USmail: Hewlett-Packard
>      fax: (208) 396-4122                       M/S 143
>    email: paul_gregory@hp.com                  11311 Chinden Blvd.
>                                                Boise, ID  83714
Paul, I would tend to agee with you that it is a bit odd. However the
model should be looked at in the context of the whole curve, not
particuliar points. It is not the particuliar points that describe the
charactisitic but rather the slope of the points. In that respect the
typical curve should lie between the two extremes. It is my belief that
if you indeed plot the curves you would find that to be the case.
Occasional massive slope change within the curve may occur. Of course on
the other hand I have known to be wrong on occasion....at least thats
what my wife claims.

Best Regards,
-- 
Fred Balistreri
fred@apsimtech.com

http://www.apsimtech.com
 
From owner-ibis  Fri Nov 14 13:33:43 1997
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To: Chris Rokusek <crokusek@qdt.com>,
        Paul Gregory <pgregory@hpbs2933.boi.hp.com>
From: Kellee Crisafulli <kellee@hyperlynx.com>
Subject: Re: typ outside min,max
Cc: ibis-users@vhdl.org
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Hi Chris,

At 10:35 AM 11/14/97 -0800, Chris Rokusek wrote:
>Without first de-referencing each Pullup/Pulldown and each Power
>Clamp/GND Clamp from its "Reference voltage" and then summing them
>together appropriately I don't think a check is possible.  For example,
>it is possible (although perhaps not desirable) that a max and min
>Pullup curve use the same Voltage reference value (i.e. 5V) however the
>zero current crossing point on the voltage axis when looking at the raw
>curves (w/o de-referencing) differs by .5V.  Or maybe the curves are
>EXACTLY the same with just different reference voltages.  A single
>Pullup/Pulldown curve cannot be looked at in isolation unless the shunts
>curve currents are 0.
Chris, didn't you already write code to do the above  for the new
IBIS golden parser?  If so could it be re-used.

>My first impulse is that even if the curves are added appropriately I
>would expect many exceptions to occur--esp. near the 0-current crossing
>points and in the shunt regions.  Possible in the middle of the
>operating range a single check might work most of the time.
I agree, this could be limited to currents greater than |100ua|  (magnitude)
and it would certainly need to be a warning not an error.  Also it should probably
just count the number of them and report the total number of min's or max's that
are larger/smaller than typ.  This way it wouldn't show 100 entries all off by 1fA
Also the test should allow something like +-10uA around typ. as ok.

Then again this is getting rather complex.....
(keep it simple may apply) -> don't add a new test





-------------------------------------------------------------------------
Have a great day...
Kellee Crisafulli at HyperLynx
kellee@hyperlynx.com	http://www.hyperlynx.com
-------------------------------------------------------------------------
 
From owner-ibis  Fri Nov 14 15:14:29 1997
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Date: Fri, 14 Nov 97 18:05:12 EST
From: Andrew Ingraham <ingraham@wrksys.ENET.dec.com>
To: pgregory@hpbs2933.boi.hp.com
Cc: ibis-users@vhdl.org, ingraham@wrksys.ENET.dec.com
Apparently-To: ibis-users@vhdl.org, pgregory@hpbs2933.boi.hp.com
Subject: Re: typ outside min,max

Indeed, the IBIS "min" and "max" columns do not necessarily represent
the min and max extremes of output current.

The "min" column represents "slow" or "weak" conditions: weak process,
supply voltages are at minimum, and temperature is either minimum (for
bipolar) or maximum (CMOS).  The "max" column is the opposite.

I think it is conceivable that some intermediate conditions might fall
outside these two cases over limited voltage regions, especially if
there is anything in the buffer that is very nonlinear, even as simple
as a diode.  Places where the I/V curves have sharp curvature, are
more susceptible.  I/V curves do not always simply scale up and down
vertically (vs. voltage) as you vary temperature and supply voltage;
they also shift somewhat left or right, which can appear to move
portions of the curves the wrong way when you are looking only at
I vs. V.

If the device is Bi-CMOS, odd things can happen vs. temperature. 
Some bi-CMOS parts get faster/stronger with lower temperatures, some
do the opposite, others may do a combination of both.

If your IBIS model was prepared correctly (a *big* IF), my guess is
this is bipolar or bi-CMOS, judging by the strong nonlinearity of the
pulldown around 0V.

Notice that it's not only the two points you highlighted that look out
of place, but the entire region shown below 0V.  I(typ) is about twice
I(max) down there!

Also note that the curves miss the origin by milliamps.  Some buffers
really do this.  Or maybe it's measurement error.  Or an error
compiling the measured or simulated data into the IBIS model (since
we're looking only at the [Pulldown] table).

Regards,
Andy Ingraham
 
From owner-ibis  Fri Nov 14 16:04:33 1997
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Date: Fri, 14 Nov 1997 15:59:28 -0800 (PST)
From: bob@icx.com (Bob Ross)
To: pgregory@hpbs2933.boi.hp.com
Subject: Re: typ outside min,max
Cc: ibis-users@vhdl.org, ingraham@wrksys.enet.dec.com

Paul:

In one particular BiCMOS device where I did s2ibis conversions
for an ABT Spice model using voltage, temperature, and process
variations, I got min and max tables crossing the typ tables in
the clamping region, and also points where the typ data was 
larger than the min and max data at .3V and the min data was
larger than the max data at .2V for the [Pulldown] table.
So I have a real situation that demostrates what Andy is
referring to.

Bob Ross
Interconnectix

> Date: Fri, 14 Nov 97 18:05:12 EST
> From: Andrew Ingraham <ingraham@wrksys.ENET.dec.com>
> To: pgregory@hpbs2933.boi.hp.com
> Cc: ibis-users@vhdl.org, ingraham@wrksys.ENET.dec.com
> Apparently-To: ibis-users@vhdl.org, pgregory@hpbs2933.boi.hp.com
> Subject: Re: typ outside min,max
> Status: R

> Indeed, the IBIS "min" and "max" columns do not necessarily represent
> the min and max extremes of output current.

> The "min" column represents "slow" or "weak" conditions: weak process,
> supply voltages are at minimum, and temperature is either minimum (for
> bipolar) or maximum (CMOS).  The "max" column is the opposite.

> I think it is conceivable that some intermediate conditions might fall
> outside these two cases over limited voltage regions, especially if
> there is anything in the buffer that is very nonlinear, even as simple
> as a diode.  Places where the I/V curves have sharp curvature, are
> more susceptible.  I/V curves do not always simply scale up and down
> vertically (vs. voltage) as you vary temperature and supply voltage;
> they also shift somewhat left or right, which can appear to move
> portions of the curves the wrong way when you are looking only at
> I vs. V.

> If the device is Bi-CMOS, odd things can happen vs. temperature. 
> Some bi-CMOS parts get faster/stronger with lower temperatures, some
> do the opposite, others may do a combination of both.

> If your IBIS model was prepared correctly (a *big* IF), my guess is
> this is bipolar or bi-CMOS, judging by the strong nonlinearity of the
> pulldown around 0V.

> Notice that it's not only the two points you highlighted that look out
> of place, but the entire region shown below 0V.  I(typ) is about twice
> I(max) down there!

> Also note that the curves miss the origin by milliamps.  Some buffers
> really do this.  Or maybe it's measurement error.  Or an error
> compiling the measured or simulated data into the IBIS model (since
> we're looking only at the [Pulldown] table).

> Regards,
> Andy Ingraham


 
From owner-ibis  Mon Nov 17 05:57:32 1997
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Subject: IBIS models

A:  INTERNET--IBMMAIL

De: Laure BESSETTES___  Email: L.Bessettes.Alcatel(a)e-mail.com
ALCATEL ESPACE - DPR/CAL/EMC
Tel: 05.61.19.67.49   Fax: 05.61.19.69.72
Objet:   IBIS models


I work with the EMC software of Quad-Design, and I need some models
of ECL Differential devices.
Are the NS100112 driver and the NS100105 receiver models are available?
If not, any other ECL DIFFerential Driver and Receiver wil be convenient.

Thanks.
Laure BESSETTES

 
From owner-ibis  Tue Nov 18 02:08:58 1997
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From: FABRICE.BOISSIERES@st.com
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Subject: need some info on how IBIS models are use 
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Hello Everybody

We are developping some models IBIS for IO.
And i want to know if anybody have some information on how these
models are used by PCB people.
What type of analysis are executed in PCB with IBIS model ?

Does it exist in public domain and ibis simulator ?

Thank you for your help

Fabrice BOISSIERES
 
From owner-ibis  Tue Nov 18 05:13:28 1997
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Date: Tue, 18 Nov 1997 08:11:24 -0500
From: Dan Aleksandrowicz <dan@kaw.com>
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To: FABRICE.BOISSIERES@st.com, "ibis-users@vhdl.org" <ibis-users@vhdl.org>
Subject: Re: need some info on how IBIS models are use
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Hi Farbrice.

As an IBIS user I usually use the IBIS model I/O buffer to drive
and recive signals on multi driver reciver nets.
And these signals are usually interconnected via T-linse.
As for the signal frequency I use - it is usually, 70% of the cases,
around the 95% of the highest rated clock frequency data specifications. 

I hope this helps you.

Dan Aleksandrowicz
Engineering Solutions
KAW/USA

FABRICE.BOISSIERES@st.com wrote:
> 
> Hello Everybody
> 
> We are developping some models IBIS for IO.
> And i want to know if anybody have some information on how these
> models are used by PCB people.
> What type of analysis are executed in PCB with IBIS model ?
> 
> Does it exist in public domain and ibis simulator ?
> 
> Thank you for your help
> 
> Fabrice BOISSIERES
 
From owner-ibis  Thu Nov 20 08:34:49 1997
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Date: Thu, 20 Nov 1997 13:49:30 -0200 (EDT)
From: Marcelo Souza Ferreira <souza@lorentz.nupes.cefetpr.br>
Message-Id: <199711201549.NAA12456@mailer.nupes.cefetpr.br>
To: ibis-users@vhdl.org
Subject: s2ibis for W95
X-Sun-Charset: US-ASCII

Hi,


		I need to employ s2ibis, but my operacional system isn't Windows NT, it's  Windows 95. Is there some s2ibis for W95? I know there are some s2ibis for download at NCSU, include s2ibis for DOS, but some then are damaged, and it is not possible incompress then. I'm having problems with the DOS' s2ibis, too. When I try to employ the executable s2ibis10, DOS version, using the Pspice,the following message is appearing: 'Can't open the spice deck file pdtthree.spipdtthree.outpdtthree.msg'. Could you explain me  what's happening and what shall I do for it work out? Or: -- how can I get a funcional s2ibis for W95 or DOS? I really need this conversion software and wait for your answer. Thanks.
 				

						Marcelo Ferreira.
 
 
From owner-ibis  Fri Nov 21 14:01:15 1997
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Date: Fri, 21 Nov 1997 13:58:23 -0800 (PST)
From: bob@icx.com (Bob Ross)
To: ibis-users@eda.org, ibis@eda.org, si-list@silab.eng.sun.com
Subject: EUROPEAN IBIS SUMMIT ANNOUNCEMENT


          E U R O P E A N   I B I S   S U M M I T   M E E T I N G 

Time/Date:     8 AM - 5 PM, Thursday, February 26, 1998

Location:      Concorde-Lafayette Hotel (Adjacent to Le Palais des Congress
               de Paris Porte Mailot - Site of the DATE98 Conference)
               Paris, France

Content:       Presentations and Discussions

Purpose:       Solicit and Exchange IBIS Model Related Information and Ideas.

Sponsors:      Mentor Graphics, Cadence (so far)

DATE98 Show:   DATE98 - February 23-26, 1998.  The IBIS meeting is scheduled
               the day following the last day of the trade show portion of the
               Conference.  

               See www.date-conference.com for more information.

PCB Symposium: An all day symposium is scheduled Wednesday, February 25, 1998
               on PCB design issues.  This is being co-organized (so far) by
               Cadence, Mentor Graphics, Incases, and Zuken-Redac.  Plan to
               include DATE98, the PCB Symposium, and the IBIS Summit Meeting
               in your visit.  More information on the PCB Symposium will be
               available at a later time. 


BACKGROUND

As a result of regular EIA IBIS Open Forum meetings since 1993, IBIS Version
2.1 has been ratified both nationaly (in the United States of America)
as ANSI/EIA-656 and internationally as IEC 62014-1.  Most of the IBIS
are conducted on a regular basis via teleconferencing, but the EIA IBIS
Open Forum also conducts two face-to-face meetings every year at the Design
Automation Conference (DAC) and DesignCon locations.  While some of the IBIS
Summits focused on resolving standards issues, others have been used for
general IBIS information exchange.  Historically, some of the IBIS advances
have come from such exchanges.

Because of wide-spread international usage and acceptance of IBIS, the
EIA IBIS Open Forum will hold a European IBIS Summit at the same time as the
DATE98 Conference and PCB Symposium in Paris, France.  We are particularly
interested the international experiences and ideas at this IBIS Summit.


CALL FOR PARTICIPANTS

People involved in IBIS Model development, EDA tool development, and digital
circuit design are invited to participate in the European IBIS Summit meeting.
If you plan to participate, please supply the information below:

  Name:
  E-mail address:
  Company:
  Telephone:

Send to:

  Bob Ross (bob@icx.com)
  

CALL FOR PRESENTATIONS

We are seeking presentations from individuals who have IBIS experiences
or issues. 

Format of Presentation:  Overhead Projections
Time:                    15-30 Minutes
Electronic Archival:     We request electronic versions so that the
                         presentations can be archived and also made
                         available to non-attendees.  Formats used in
                         the past have been text, Power Point, Word, 
                         Postscript, and Acrobat.


If you plan a presentation, please supply

  Title:
  Presenter:
  E-mail address:
  Company:
  Telephone:

  Estimate Time:

Send this to:

  Bob Ross (bob@icx.com)

(See the list below for some planned presentations and suggested topics)


AGENDA

The agenda includes presentations, discussions, breaks, and lunch (which
we are planning to provide).


FOR FURTHER INFORMATION:

Bob Ross,
Chair, EIA/IBIS Open Forum
Interconnectix Division, Mentor Graphics
10220 S.W. Nimbus Ave., K4
Portland, OR
USA

(503) 603-2523
bob@icx.com


SOME SUGGESTED AND ACTUAL PLANNED TOPICS:

Company Experiences

  Use of IBIS at Alcatel - John Fitzpatrick

  IBIS Model Development at National - Syed Huq

  Modeling Experiences at your company - Library management,
  validation, conversion, etc.

  How to have industry (model providers) converge to IBIS

  IBIS Model Generation at Semiconductor companies

  IBIS Model generation from company not active on IBIS committee

IBIS Model Generation

  Package Modeling (L, R, C)

  IBIS Models from measurement (extrapolation, equipment, package effects)

Technical Issues and Possible IBIS Extensions

  High Speed Effects

IBIS and EMC

  IBIS and Radiation Analysis - Incases

Conversions from/to IBIS and Other Formats

  Conversion Problems between Spice and IBIS - Convergence, Oscillation

  Conversions among other formats (IBIS, XTK, SigNoise, etc.)

  Simulators that support IBIS

 
From owner-ibis  Sat Nov 22 23:48:55 1997
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Message-Id: <199711230735.JAA02891@galileo.co.il>
Comments: Authenticated sender is <eitan@pop3>
From: "Eitan Medina" <eitan@galileo.co.il>
Organization: Galileo Technology Ltd.
To: ibis-users@vhdl.org
Date: Sun, 23 Nov 1997 09:44:20 +0200
MIME-Version: 1.0
Content-type: Multipart/Mixed; boundary=Message-Boundary-30235
Subject: IBIS rev 2.1 additions to rev 1.2
Priority: normal
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--Message-Boundary-30235
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Hi,

I have generated simple rev2.1 models for CMOS device, that includes
the following elements:
	pullup
	pulldown
	ramp
	rising waveform
	falling waveform
	POWER clamp
	GND clamp

I have a client who cannot use this, since he has only rev1.1
simulator, and asks for a rev1.1 model.

The Parsers in the web-site, as well an editor I have (from Hyperlynx)
verify rev2.1 compatability only (no rev1.1 compatability check...)

What should be removed/changed from the model in order to
make it readable by a rev1.1 simulator ?

From what I have read, only the rising and falling waveforms should be
removed. Am I correct ? Can someone with a rev1.1 simulator try this
out for me ?

Attached:
	Simple rev 2.1 model (with one pad)

Thanks,

	Eitan

Eitan Medina
Email: eitan@galileo.co.il
Galileo Technology Ltd.
15 Geron st. 
P.O.Box 2786
Yehud 56217
ISRAEL
Tel:   +972-3-6320220
Fax:   +972-3-6320221 
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
* check out our new web site:   http://www.GalileoT.com *
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

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`
end

--Message-Boundary-30235--
 
From owner-ibis  Mon Nov 24 10:00:49 1997
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Date: Mon, 24 Nov 1997 12:03:39 -0500
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To: si-list@silab.Eng.Sun.COM, ibis-users@eda.org
From: Kathy Breda <breda@nesa.com>
Subject: IBIS User Group Meeting - Dec. 4, 1997


Greetings:

We're pulling together a  user group for 
continuation of IBIS discussions.  Those who 
mentioned interest in being part of the user group
at the first IBIS-East Forum should have been contacted already.  
Now we're expandingthe communication to see if anyone else would like
to become actively involved.  We have limited space,
but would welcome input and/or attendance if you are
interested in becoming more involved.  Let us here
from you!

The proposed date and time for the user group 
meeting is:

        Date:     Thursday, December 4, 1997
        Time:     3:00 PM
        Location: Tentatively scheduled to be at Cadence Design
                  Chelmsford, MA

The proposed agenda follows.  Feedback and new ideas are welcome.  
Realistically only a portion of the topics can be discussed, 
so the users group can prioritize which topics should be delt 
with initially and which follow.

                        "Zeroing in from 30,000 Feet"

  *  What are the key elements that need to be in place for IBIS
     to be used for system designs (i.e. low cost or free simulator, etc.)
     (break down elements into realistic chunks, create action plans)

  *  Define what is working well with IBIS

  *  Define largest concerns with using IBIS (i.e. model validity)

  *  Insuring IBIS Model Accuracy

  *  Criteria for IBIS model validation

  *  Review of various IBIS tools (i.e.  capabilities, accessibility, sys.
reqmts.)

  *  IBIS User Group  - Keeping it open, focus, meeting frequency,
distribution list,                information management, etc.  

Thank you and we look forward to your response!

Regards,

  Kathy Breda & Ed Sayre



+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
|       NORTH EAST SYSTEMS ASSOCIATES, INC.       |
|      -------------------------------------      |
|     "High Performance Engineering & Design"     |
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
| Kathy Breda             e-mail: breda@nesa.com  |
| NESA, Inc.              http://www.nesa.com/    |
| 636 Great Road          Tel +1.978.897-8787     |
| Stow, MA 01775 USA      Fax +1.978.897-5359     |
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+

 
From owner-ibis  Mon Nov 24 16:34:26 1997
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Date: Mon, 24 Nov 1997 16:31:58 -0800 (PST)
From: bob@icx.com (Bob Ross)
To: eitan@galileo.co.il, ibis-users@eda.org
Subject: re IBIS rev 2.1 additons to rev1.2

Eitan:

You can convert this model to Version 1.1 IBIS by removing
the waveform tables as you suggest.

Also, you need to comment out or remove the [Temperature Range]
keyword and change the [IBIS Ver] to 1.1.  Any of the ibichk
utilities including ibischk2 will validate Version 1.1 models
against the Version 1.1 syntax.  With this process, you can
detect other Version 2.1 keywords and subparameters that
need to be removed for Version 1.1 level parsing.

Best Regards,
Bob Ross
Interconnectix



From: "Eitan Medina" <eitan@galileo.co.il>
Organization: Galileo Technology Ltd.
To: ibis-users@vhdl.org
Date: Sun, 23 Nov 1997 09:44:20 +0200
Subject: IBIS rev 2.1 additions to rev 1.2



Hi,

I have generated simple rev2.1 models for CMOS device, that includes
the following elements:
	pullup
	pulldown
	ramp
	rising waveform
	falling waveform
	POWER clamp
	GND clamp

I have a client who cannot use this, since he has only rev1.1
simulator, and asks for a rev1.1 model.

The Parsers in the web-site, as well an editor I have (from Hyperlynx)
verify rev2.1 compatability only (no rev1.1 compatability check...)

What should be removed/changed from the model in order to
make it readable by a rev1.1 simulator ?

>From what I have read, only the rising and falling waveforms should be
removed. Am I correct ? Can someone with a rev1.1 simulator try this
out for me ?

Attached:
	Simple rev 2.1 model (with one pad)

Thanks,

	Eitan

Eitan Medina
Email: eitan@galileo.co.il
Galileo Technology Ltd.
15 Geron st. 
P.O.Box 2786
Yehud 56217
ISRAEL
Tel:   +972-3-6320220
Fax:   +972-3-6320221 
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
* check out our new web site:   http://www.GalileoT.com *
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*

 
From owner-ibis  Tue Nov 25 13:41:50 1997
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To: eitan@galileo.co.il, ibis-users@eda.org
Subject: Re: re IBIS rev 2.1 additons to rev1.2 
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Date: Tue, 25 Nov 1997 13:39:03 -0800
From: Stephen Peters <sjpeters@ichips-jf.jf.intel.com>


Hello Eitan:

    I've been following the conversttion and I just want to add
a word of warning.  While you can convert a Ver 2.1 model into
a Ver. 1.1 model by eliminating (among other things) the waveform
tables, you may be deleting information critical to the models proper
operation. Before doing the conversion I would
check with the model creator and see if eliminating the waveform
tables will give bad simulation results.  At the least, run a
before and after simulation and compare the results.

              Regards,
              Stephen Peters
              Intel Corp.


 
From owner-ibis  Wed Nov 26 10:43:23 1997
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From: Kathy Breda <breda@nesa.com>
Subject: IBIS User Group Meeting - LOCATION/DIRECTIONS

Greetings and a Happy Thanksgiving to everyone:

If you haven't already done so, please let me know
if you plan to attend so that we can insure the meeting
room is large enough.

The IBIS User Group meeting logistics are as follows:

        Date:     Thursday, December 4, 1997
        Time:     3:00 PM
        Location: Cadence Design, Chelmsford, MA
                  

        Directions:

        Cadence Design 
        270 Billerica Road
        Chelmsford, Ma.
        Tel:  978-262-6000

        From Rt. 495 (N or S) take Rt. 3 South to Rt. 129 West (first exit)
        From Rt. 128 (N or S) take Rt. 3 North to Rt. 129 West
        Cadence is on the right ~.5 mile, look for # (270) and Cadence
        sign on front of building.

<end>



+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
|       NORTH EAST SYSTEMS ASSOCIATES, INC.       |
|      -------------------------------------      |
|     "High Performance Engineering & Design"     |
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
| Kathy Breda             e-mail: breda@nesa.com  |
| NESA, Inc.              http://www.nesa.com/    |
| 636 Great Road          Tel +1.978.897-8787     |
| Stow, MA 01775 USA      Fax +1.978.897-5359     |
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+

 
