From owner-ibis Tue Jan 6 11:36:48 1998 Received: from wile.nesa.com ([204.240.29.34]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id LAA16975 for ; Tue, 6 Jan 1998 11:36:42 -0800 (PST) Received: from porky.nesa.com(204.240.29.45) by wile.nesa.com via smap (V1.3) id sma000432; Tue Jan 6 13:39:36 1998 Message-Id: <3.0.3.32.19980106133858.0074aa98@mail.nesa.com> X-Sender: breda@mail.nesa.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.3 (32) Date: Tue, 06 Jan 1998 13:38:58 -0500 To: si-list@silab.Eng.Sun.COM, ibis-users@eda.org, phil@avici.com, tclarke@avici.com, cdean@avici.com, klepage@avici.com, aaron_boxer@3mail.3com.com, Chris_Heard/US/3Com%3COM@smtp1.isd.3com.com, Mitch_Rosich@3mail.3com.com, doucette@wonder.enet.dec.com, nolan@gaas.enet.dec.com, burns@ricks.enet.dec.com, thierauf@rock.enet.dec.com, wenners@ricks.enet.dec.com, hyer@gaas.enet.dec.com, lachapelle@gaas.enet.dec.com, haller@wonder.enet.dec.com, jake@rock.enet.dec.com, funaro@gaas.enet.dec.com, derenne@poboxa.enet.dec.com, ramey@rock.enet.dec.com, mayew@rock.enet.dec.com, james.mayrand@digital.com, bruce@hw.stratus.com, Dan_Fitzpatrick@stratus.com, Ed_Cassinelli@stratus.com, Vin_Curran@stratus.com, Bill_Hoyle@stratus.com, Vicky_Triolo@stratus.com, Keith_StPierre@stratus.com, Scott_Simmons@stratus.com, Steve_Mango@stratus.com, mike.gilbert@fairchildsemi.com, gary.o'donnell@fairchildsemi.com, william.r.houk@fairchildsemi.com, Peter.LaFlamme@fairchildsemi.com, graham@spcfs2.nsc.com, pgroth@fmis02.nsc.com, andrew.grace@fairchildsemi.com, William.Spreen@fairchildsemi.com, rbaracka@casc.com, bbranscomb@casc.com, thawkins@world.std.com, rainville@casc.com, crn@casc.com, fkb1@casc.com, ped1@casc.com, tah1@casc.com, jpj1@casc.com, DavidJJ@bergelect.com, krausd@bergelect.com, elcora@aol.com, ddeutsch@bbn.com, jrokosz@bbn.com, rosterlind@bbn.com, hyeh@bbn.com, tholtey@bbn.com, jseeger@bbn.com, tony_lavely@mc.com, mark_laforest@mc.com, evans@mc.com, psg@BayNetworks.COM, rangle@BayNetworks.COM, jfitz@BayNetworks.COM, fboptions@sprintmail.com, cmarsh@fore.com, jck@fore.com, warden@fore.com, Elliot.Lipin@gensig.com, pzdinak@tautron.com, bobd@tautron.com, bcarlile@ub.com, jwelch@ub.com, wmahla@cassatt.Mass-USR.COM, rgd@mass-usr.com, gjankaus@mass-usr.com, pgjr@cadence.com, kwillis@node2.cadence.com, bobv@node2.cadence.com, ericb@node2.cadence.com, Gary_Husted@ccm2.hf.intel.com, 102101.136@compuserve.com, pfield@compurep.com, dacase@attmail.com, jaydiep@us.ibm.com, mmatejic@foxboro.com, sayre@unix.cie.rpi.edu, jpatel@funies.enet.dec.com, kpotvin@viewlogic.com, joe@trilogic.com, csteinbeis@xynetic.com, hemants@xynetic.com, wnorwood@smtp.microcom.com, joe_logan@avanticorp.com, cohan@boston.mentorg.com, rick@dolphinics.com, scoe@ctron.com, jcarter@ctron.com, selliot@ctron.com, bezanson@ctron.com, pearsall@ctron.com, Kweldon@ctron.com, wingate@ctron.com, makris@ccmailpc.ctron.com, dereko@ctron.com, paradis@ctron.com, fleming@ctron.com, jspencer@ctron.com, dferro@ctron.com, cbell@ctron.com, shimer@ctron.com, notaro@ctron.com, kbeach@ctron.com, mehmetd@ctron.com, damiano@ctron.com, cmartin@ctron.com, ddoherty@ctron.com, rkroposk@ctron.com, jsims@ctron.com, timyu@ctron.com, wham@ctron.com, kheath@ctron.com, nietupsk@ctron.com, abdallah@ctron.com, mattica@ctron.com, jhpierce@ctron.com, pmuckerh@ctron.com, ccallen@ctron.com, milbury@ctron.com, prich@earthlink.net, donaldt@cadence.com, Greg.Edlund@digital.com, gpf@cadence.com, zimmermj@btu.ibm.com From: Kathy Breda Subject: IBIS User Meeting - Jan. 15, 1998 at 3:00pm Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Greetings: We will be holding the third IBIS User Group meeting here on the East Coast - Date: Thursday, January 15, 1998 Time: 3:00 PM Place: Stratus Computer, Marlboro, Massachusetts **Please respond to this message and let us know if you plan to attend - Thank You** Agenda: Review the activities of the two sub-committees formed at the last meeting: 1) IBIS model validation/accuracy - how to construct a standard for valid models useful in system applications, how they are simulated under different loading and termination conditions, etc. headed by Greg Edlund, DEC. (greg.edlund@digital.com) 2) Software aspects of IBIS as it affects the user community - IBIS to SPICE, SPICE to IBIS, syntax and documentation, materials for education & Standardization, etc. headed by Paul Galloway, Cadence Design (pgjr@cadence.com) 3) Other business: Upcoming IBIS summit in California Next month's agenda, Any other topics of interest to the group Directions: Stratus Computer, Inc. 55 Fairbanks Boulevard Marlboro, Massachusetts, U.S.A. 508-460-2000 We will be meeting in Room 7 in the Visitor Center next to the main lobby. Bruce Heilbrunn has been very kind to host the meeting at Stratus. A map and directions can be found: http://www.stratus.com/int/locations/home.html Directions: >From I-495 Take Exit 25A "To 85 / Marlboro". Travel on this road about 2 miles toward Route 85 and go to the second traffic light. Turn right on Route 85, at the 99 Restaurant. Follow 85 South just over 1 mile to the second traffic light, and turn right onto Hudson Street. Continue straight up the hill toward the large Stratus sign. Take the first right and follow the signs to Visitor Parking. There you will find the Main Lobby. Please check in there. From owner-ibis Tue Jan 6 13:15:04 1998 Received: from wile.nesa.com ([204.240.29.34]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id NAA18712 for ; Tue, 6 Jan 1998 13:15:00 -0800 (PST) Received: from porky.nesa.com(204.240.29.45) by wile.nesa.com via smap (V1.3) id sma000979; Tue Jan 6 16:08:42 1998 Message-Id: <3.0.3.32.19980106160804.0075ed54@mail.nesa.com> X-Sender: breda@mail.nesa.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.3 (32) Date: Tue, 06 Jan 1998 16:08:04 -0500 To: si-list@silab.Eng.Sun.COM, ibis-users@eda.org From: Kathy Breda Subject: IBIS User Meeting - Jan. 15, 1998 at 3:00pm Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" >Greetings: > >We will be holding the third IBIS User Group meeting here >on the East Coast - > > Date: Thursday, January 15, 1998 > Time: 3:00 PM > Place: Stratus Computer, Marlboro, Massachusetts > >**Please respond to this message and let us know if you > plan to attend - Thank You** > > >Agenda: > >Review the activities of the two sub-committees formed >at the last meeting: > >1) IBIS model validation/accuracy - how to construct a standard > for valid models useful in system applications, how they are simulated > under different loading and termination conditions, etc. > headed by Greg Edlund, DEC. (greg.edlund@digital.com) > >2) Software aspects of IBIS as it affects the user community - > IBIS to SPICE, SPICE to IBIS, syntax and documentation, materials > for education & Standardization, etc. > headed by Paul Galloway, Cadence Design (pgjr@cadence.com) > >3) Other business: Upcoming IBIS summit in California > Next month's agenda, > Any other topics of interest to the group > >Directions: > > Stratus Computer, Inc. > 55 Fairbanks Boulevard > Marlboro, Massachusetts, U.S.A. > 508-460-2000 > > We will be meeting in Room 7 in the Visitor Center > next to the main lobby. > > Bruce Heilbrunn has been very kind to > host the meeting at Stratus. > > >A map and directions can be found: >http://www.stratus.com/int/locations/home.html > >Directions: > >>From I-495 >Take Exit 25A "To 85 / Marlboro". >Travel on this road about 2 miles >toward Route 85 and go to the second >traffic light. Turn right on Route 85, >at the 99 Restaurant. Follow 85 South >just over 1 mile to the second traffic >light, and turn right onto Hudson Street. >Continue straight up the hill toward the >large Stratus sign. Take the first right >and follow the signs to Visitor Parking. >There you will find the Main Lobby. >Please check in there. > > From owner-ibis Fri Jan 9 15:31:06 1998 Received: from palrel1.hp.com (palrel1.hp.com [156.153.255.242]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id PAA05950 for ; Fri, 9 Jan 1998 15:31:05 -0800 (PST) From: PRASAD_VENUGOPAL@HP-SanJose-om1.om.hp.com Received: from hpbs4857.boi.hp.com (hpbs4857.boi.hp.com [15.56.8.29]) by palrel1.hp.com (8.8.6/8.8.5tis) with ESMTP id PAA00695 for ; Fri, 9 Jan 1998 15:28:44 -0800 (PST) Received: from localhost (root@localhost) by hpbs4857.boi.hp.com with SMTP (8.7.1/8.7.3 TIS 5.0 Openmail) id PAA05673 for ibis-users@vhdl.org; Fri, 9 Jan 1998 15:28:44 -0800 (PST) X-OpenMail-Hops: 1 Date: Fri, 9 Jan 1998 15:28:27 -0800 Message-Id: Subject: Pseudo-ECL output models MIME-Version: 1.0 TO: ibis-users@vhdl.org CC: VENUGOPAL_PRASAD/HP-SanJose_om1@hpbs4857.boi.hp.com Content-Type: text/plain; charset=US-ASCII; name="cc:Mail" Content-Disposition: inline; filename="cc:Mail" Content-Transfer-Encoding: 7bit Hi, all. For a communications serializer-deserializer high speed(1Gb/s) serial output IC, with the following configuration,(ignore the *star* line till you get to question 3) * |------|-----*--------------------- > > * | | < < * | |/ | |___C_*______|___________| | | * | |\ | | * | | | | * |/ A____ |______|___D_*_____| | | | | * |\ | < | | * | | > |/ \| * | | | -----| | * | | GND | | * B____________|________ |\ /| * Current Current | | | * source Source | --------- * | | < | * | | > | * | | | Current * GND GND GND Source * | | GND Where A and B are the IC buffer boundary and the two resistors to ground are 150 ohms each from A and B, I am trying to generate an IBIS model. I have the following questions- 1. For the pull-up and pull-down tables I get negative currents. I understand that for standard ECL outputs,currents are positive. Will this cause any simulation difficulties? ( For simulation, the buffer shown above is ac coupled to a transmission line and terminated differentially in 2*Z0) 2. For generating the IBIS pullup/pulldown table, I bias the buffer in such a way that one of the outputs is "high"/"low" and the other is "low"/"high", with the 150 ohm resistors in place. Then on the output that is "high" a voltage is swept in steps while monitoring the current. Is this the correct way of generating the IBIS table?( Note that one leg of the differential outputs has only the 150 ohm resistor to ground while a voltage is connected to the other leg and is being swept while currents are being measured) 3. For an output buffer structure that is shown on the left hand side of the vertical *star* line, with C and D as the differential output terminals, has any one come up with an IBIS model? This output structure is used for high speed buffers and the traditional way of generating the IBIS tables do not work. (This kind of structure is very useful in that in provides back termination for transmission lines without any external resistors and the biasing of the internal transistors is automatic) Again, typically, this buffer is ac coupled to a transmission line that is terminated differentially in 2*Z0 for simulation. Answers, suggestions and questions are welcome. If this information exists somewhere please direct me to it. (I did not find it in the cookbook) Thanks. From owner-ibis Sat Jan 10 13:24:18 1998 Received: from bingsun1 (bingsun1.cc.binghamton.edu [128.226.1.2]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id NAA27517 for ; Sat, 10 Jan 1998 13:24:17 -0800 (PST) Received: from localhost (bg21359@localhost) by bingsun1 (SMI-8.6/8.6.9) with SMTP id QAA13189 for ; Sat, 10 Jan 1998 16:21:54 -0500 Date: Sat, 10 Jan 1998 16:21:54 -0500 (EST) From: Ming Yin X-Sender: bg21359@bingsun1 To: ibis-users@vhdl.org Subject: about [ramp] Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Hi, everybody I want to verify whether in the ramp time dv/dt, voltage is refered to output voltage and the ramp time is used to control pulldown and pullup devices. Thanks in advance. ming From owner-ibis Sun Jan 11 18:20:12 1998 Received: from mailgate.cadence.com (mailgate.Cadence.COM [158.140.2.1]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id SAA26819 for ; Sun, 11 Jan 1998 18:20:12 -0800 (PST) Received: (from smap@localhost) by mailgate.cadence.com (8.8.5/8.6.8) id SAA22994; Sun, 11 Jan 1998 18:17:49 -0800 (PST) Received: from hi-av1.cadence.com(158.140.128.31) by mailgate.cadence.com via smap (mjr-v1.2) id xma884571468.022990; Sun, 11 Jan 98 18:17:48 -0800 Received: from node2.boston (node2 [158.140.103.70]) by mailhub.Cadence.COM (8.8.5/8.7.3) with SMTP id SAA16901; Sun, 11 Jan 1998 18:17:47 -0800 (PST) Received: from pc-pgjr.cadence.com by node2.boston (SMI-8.6/SMI-SVR4) id VAA10998; Sun, 11 Jan 1998 21:17:40 -0500 Message-Id: <2.2.32.19980112021134.00ae8d08@node2> X-Sender: pgjr@node2 X-Mailer: Windows Eudora Pro Version 2.2 (32) Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Date: Sun, 11 Jan 1998 21:11:34 -0500 To: si-list@silab.Eng.Sun.COM, ibis-users@eda.org From: Paul Galloway Subject: IBIS User Group Sub-Committee Cc: pgjr@node2.cadence.com Hi, As many of you are aware there have been two sub-committees formed at the IBIS Group Meeting. The definition of these are listed below, as outlined at the User Group. While these are still in the formative stages I would like to invite anyone interested in participating in sub-committee #2 to contact me. The only requirement is an interest or a need to use IBIS/behavioral models for signal integrity analysis. Extent of participation and amount of time devoted depend only on you. Exact definition of what sub-committee #2 should address is still open so if you have specific issues this is an opportunity to make them visible to a larger audience. While it's useful to be physically present at the User Group meeting (next one at Stratus in Marlboro, Mass.), it's not absolutely critical. 1) IBIS model validation/accuracy - how to construct a standard for valid models useful in system applications, how they are simulated under different loading and termination conditions, etc. headed by Greg Edlund, DEC. (greg.edlund@digital.com) 2) Software aspects of IBIS as it affects the user community - IBIS to SPICE, SPICE to IBIS, syntax and documentation, materials for education & Standardization, etc. headed by Paul Galloway, Cadence Design (pgjr@cadence.com) Thanks, Paul Paul Galloway Sr. Spectrum Services Mgr Cadence Design Systems 508-262-6231 From owner-ibis Mon Jan 12 10:48:51 1998 Received: from ganymede.or.intel.com (ganymede.or.intel.com [134.134.248.3]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id KAA14363 for ; Mon, 12 Jan 1998 10:48:47 -0800 (PST) Received: from ichips-jf.jf.intel.com (ichips-jf.jf.intel.com [134.134.50.200]) by ganymede.or.intel.com (8.8.6/8.8.5) with ESMTP id KAA11771; Mon, 12 Jan 1998 10:40:17 -0800 (PST) Received: from xtg801 (xtg801.intel.com [134.134.120.169]) by ichips-jf.jf.intel.com (8.8.8/8.8.7) with ESMTP id KAA13133; Mon, 12 Jan 1998 10:48:14 -0800 (PST) Received: from ichips.intel.com by xtg801 (8.8.8/WW2.1) id KAA06018; Mon, 12 Jan 1998 10:39:29 -0800 (PST) Message-Id: <199801121839.KAA06018@xtg801> X-Mailer: exmh version 1.6.9 8/22/96 To: PRASAD_VENUGOPAL@hp-sanjose-om1.om.hp.com Subject: Re: Pseudo-ECL output models Cc: ibis-users@vhdl.org In-reply-to: Your message of "Fri, 09 Jan 1998 15:28:27 PST." Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Mon, 12 Jan 1998 10:39:28 -0800 From: Stephen Peters Hello Prasad: Interesting circuit you have there! I assume that the 'current source' you show at the output nodes is used to extablish a current flow thru the termination resistors even if both of the upper xsistors are off. The upper xsistor then supply current to change the logic level -- correct? Anyway, my answers are below, prefefixed with >>>. Regards, Stephen Peters Intel Corp. > > Hi, all. > > For a communications serializer-deserializer high speed(1Gb/s) serial > output IC, with the following configuration,(ignore the *star* line till > you get to question 3) > > > * > |------|-----*--------------------- > > > * | | > < < * | |/ > | |___C_*______|___________| > | | * | |\ > | | * | | > | | * |/ A____ > |______|___D_*_____| | | > | | * |\ | < > | | * | | > > |/ \| * | | | > -----| | * | | GND > | | * B____________|________ > |\ /| * Current Current | > | | * source Source | > --------- * | | < > | * | | > > | * | | | > Current * GND GND GND > Source * > | > | > GND > > Where A and B are the IC buffer boundary and the two resistors to > ground are 150 ohms each from A and B, > > I am trying to generate an IBIS model. I have the following questions- > > 1. For the pull-up and pull-down tables I get negative currents. I > understand that for standard ECL outputs,currents are positive. Will this > cause any simulation difficulties? ( For simulation, the buffer shown above > is ac coupled to a transmission line and terminated differentially in 2*Z0) >>> Actually, for standard ECL outputs the current direction is >>> 'negative' (assuming positive current flows from + to - >>> (hole flow)). I don't think that should cause simulators >>> difficulty, as long as all tables are consistent. >>> By the way, could you please explain what you mean by 'ac coupling' >>> to a transmission line? To me, ac coupling means putting a >>> capacitor is series with the output to block DC current and >>> voltage -- which doesn't make much sense. Please enlighten. > > 2. For generating the IBIS pullup/pulldown table, I bias the buffer in such > a way that one of the outputs is "high"/"low" and the other is > "low"/"high", with the 150 ohm resistors in place. Then on the output that > is "high" a voltage is swept in steps while monitoring the current. Is this > the correct way of generating the IBIS table?( Note that one leg of the > differential outputs has only the 150 ohm resistor to ground while a > voltage is connected to the other leg and is being swept while currents are > being measured) >>> From what you have described, it sounds correct. I emphasis that >>> the leg you apply the voltage to and measure the current on does >>> NOT have the 150 termination resistor. Also, remember to remove >>> any package model -- you want just the DC output characteristics >>> of the output node itself. > > 3. For an output buffer structure that is shown on the left hand side of > the vertical *star* line, with C and D as the differential output > terminals, has any one come up with an IBIS model? This output structure > is used for high speed buffers and the traditional way of generating the > IBIS tables do not work. > (This kind of structure is very useful in that in provides back termination > for transmission lines without any external resistors and the biasing of > the internal transistors is automatic) Again, typically, this buffer is ac > coupled to a transmission line that is terminated differentially in 2*Z0 > for simulation. >>> Fundementally, the C and D outputs are standard open-collector >>> outputs, which the IBIS spec will handle just fine. The only >>> trick is that the two ouputs have a 'differential' relationship >>> but again, you should be able to specify that in IBIS. > > > Answers, suggestions and questions are welcome. If this information exists > somewhere please direct me to it. (I did not find it in the cookbook) > > Thanks. From owner-ibis Wed Jan 14 02:25:58 1998 Received: from kaw.com ([206.155.177.89]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id CAA26603 for ; Wed, 14 Jan 1998 02:25:53 -0800 (PST) Received: by kaw.com; id AA02701; Wed, 14 Jan 98 05:25:35 EST Received: from omni.kaw.com(192.168.200.83) by explorer via smap (V3.1) id xma002699; Wed, 14 Jan 98 05:25:06 -0500 Received: from blazer.kaw.com (blazer [192.168.200.90]) by kaw.com (8.7.5/8.7.3) with SMTP id FAA01724; Wed, 14 Jan 1998 05:22:17 -0500 (EST) Received: by blazer.kaw.com (SMI-8.6/SMI-SVR4) id FAA00595; Wed, 13 Nov 1996 05:19:54 -0500 Date: Wed, 13 Nov 1996 05:19:54 -0500 From: dan@kaw.com (Dan Aleksandrowicz) Message-Id: <199611131019.FAA00595@blazer.kaw.com> To: si-list@silab.Eng.Sun.COM, ibis-users@eda.org Subject: Please change the mailing list Cc: maeda@omni.kaw.com X-Sun-Charset: US-ASCII Hi their, I am Shinichi Maeda - KAW/USA. Woule you please add my e-mail address (maeda@kaw.com) to "si-list" and "ibis-users" list. Thank you very much !! S.Maeda - KAW/USA (maeda@kaw.com) From owner-ibis Wed Jan 14 02:59:35 1998 Received: from lsi.lsil.com (lsi.lsil.com [147.145.40.2]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id CAA27263 for ; Wed, 14 Jan 1998 02:59:35 -0800 (PST) Received: from mhost.lsil.com (mhost.lsil.com [147.145.69.84]) by lsi.lsil.com with SMTP id CAA00370 (8.6.12/IDA-1.6 for ); Wed, 14 Jan 1998 02:57:14 -0800 Received: from lonfs01.lsil.com (lonfs01-e2) by mhost.lsil.com id AA07663 (4.1/SMI-4.1 for ibis-users@eda.org); Wed, 14 Jan 98 02:56:36 PST Received: from lonpc105.lsil.com (londh535) by lonfs01.lsil.com (4.1/LSI-1.2) id AA15172; Wed, 14 Jan 98 10:56:32 GMT Message-Id: <34BC9B59.D0C0A538@lsil.com> Date: Wed, 14 Jan 1998 11:02:49 +0000 From: Sean Cardosa Organization: LSI Logic Europe, Communications Marketing X-Mailer: Mozilla 4.01 [en] (Win95; I) Mime-Version: 1.0 To: ibis-users@eda.org Subject: Subscribe X-Priority: 3 (Normal) Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Please could you subscribe me to your user group. Sean Cardosa Senior Apllications Engineer LSI Logic Europe Greenwood House London Road Barcknell, Berks, RG12 2UB, England. email id: seanc@lsil.com From owner-ibis Fri Jan 16 09:35:57 1998 Received: from relayhost.vlsi.com (tweety.vlsi.com [134.27.20.23]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id JAA24393 for ; Fri, 16 Jan 1998 09:35:56 -0800 (PST) From: harish.patel@tempe.vlsi.com Received: (from nobody@localhost) by relayhost.vlsi.com (8.6.12/Hub-Perlotto/050895) id JAA12284 for ; Fri, 16 Jan 1998 09:33:04 -0800 Received: from anubis.tempe.vlsi.com(134.27.128.1) by tweety.vlsi.com via smap (V2.0) id xma012271; Fri, 16 Jan 98 09:32:54 -0800 Received: from pcdmail.tempe.vlsi.com (hole.tempe.vlsi.com [134.27.128.11]) by relayhost.tempe.vlsi.com (8.6.9/Hub-Perlotto/101195) with ESMTP id KAA28706 for ; Fri, 16 Jan 1998 10:32:53 -0700 Received: from mardi (mardi.tempe.vlsi.com [134.27.133.22]) by pcdmail.tempe.vlsi.com (8.6.9/Hub-Perlotto/032095) with ESMTP id KAA27253 for ; Fri, 16 Jan 1998 10:32:51 -0700 Received: by mardi id KAA04024; Fri, 16 Jan 1998 10:32:51 -0700 Date: Fri, 16 Jan 1998 10:32:51 -0700 Message-Id: <199801161732.KAA04024@mardi> To: ibis-users@vhdl.org Subject: Problem for generating IBIS model for diff. input buffer Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Content-MD5: 6QQRU58pqgm27u0OfJMTBQ== Hello, Let me describe what I am doing: I have a variable threshold input buffer with a bias pin and input pin. I am trying to generate an ibis model for this pad. I am treating this as a differential input buffer with input pin as diff_pin and bias pin as inv_pin. In .s2i file it looks like this: [Pin] 1 vdd VCC POWER 2 gnd GND GND 4 in in lsvc03 5 ref ref dummy | [Diff pin] | 4 5 200mv 0 0 0 | | | Model defination | [Model] lsvc03 [Model type] Input [polarity] non-inverting [Vinl] 0.8v [Vinh] 2.0v [Model file] model.typ model.min model.max The ref pin is a bias pin which is set at 40% of VDD. After I generate IBIS model, I see power and ground clamp data in the model, but it writes some crazy values for vinl and vinh which are as: |************************************************************************ | Model lsvc03 |************************************************************************ | [Model] lsvc03 Model_type Input Polarity Non-Inverting Vinl =4.651e-309V Vinh =9.301e-309V C_comp 5.00pF 5.00pF 5.00pF What I am not able to get it is how this values of vinl and vinh are put out there after ibis model is generated. It looks really bogus numbers. (Originally in .s2i I had defined them as vinl=0.8v and vinh=2.0 , just guess values). Is it s2ibis calcualting these values and putting it there? Is that what s2ibis suppose to do or it should copy down the values that you have defined in .s2i file. I tried to look into email archives on WEB, but couldn't find anything that can help me. Any suggestion or help is welcome. Thanks in advance. _______________________________________________________________ Harish Patel VLSI Technology, Inc. Sr. Design Engineer Computing Solutions Group harish.patel@tempe.vlsi.com 8375 S River Parkway 602-752-6202/Fax:602-752-6002 Tempe, Arizona 85284 _______________________________________________________________ A policy is a temporary creed liable to be changed, but while it holds good it has to be pursued with apostolic zeal. -- Mahatma Gandhi From owner-ibis Thu Jan 22 14:53:34 1998 Received: from wile.nesa.com ([204.240.29.30]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id OAA01017 for ; Thu, 22 Jan 1998 14:53:32 -0800 (PST) Received: from porky.nesa.com(204.240.29.45) by wile.nesa.com via smap (V1.3) id sma012352; Thu Jan 22 17:22:23 1998 Message-Id: <3.0.3.32.19980122172147.00764f60@mail.nesa.com> X-Sender: breda@mail.nesa.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.3 (32) Date: Thu, 22 Jan 1998 17:21:47 -0500 To: si-list@silab.Eng.Sun.COM, ibis-users@eda.org From: Kathy Breda Subject: IBIS user group meeting minutes - 1/18/98 Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" >***Minutes of IBIS users group meeting held at Status > on Thursday, January 18, 1998*** > >Thanks to the big crowd who attended the meeting, the presenters >and to Stratus for hosting the meeting for the group! > >Presentations were made by the sub-committee chair people, >Paul Galloway (pgjr@cadence.com) and Greg Edlund (greg.edlund@digital.com). >If you are interested in copies of these presentations either >send mail to Kathy Breda, or to either of the speakers. > >Topic #1: Software Aspects of IBIS as it affects the user community - Paul Galloway > >Members of the Sub-committee include: > >Ian Dodd (Veribest) >Paul Galloway (Cadence) >Craig Lewis (Cadence) >Michael Mirmak (Intel) >Haruny Said (HAS Electronics) >Fabrizio Zanella (EMC) > >The group has been focusing on SPICE to IBIS, IBIS to SPICE conversions, >Model requirements for sufficient analysis, Syntax and documentation >education. > >A couple of quick comments: > >SPICE to IBIS conversions - a lot of data (docs and utilities) are beginning >to be made available. There is a need for upgrading SPICE to IBIS 3.x - looking >for suggestions on how to make this happen. > >IBIS to SPICE conversions - Much less data available. Users want this utility and >the IBIS users group believes that the SPICE vendors should support this type >of capability. Plans are being developed on how the user group can petition vendors to provide this capability. > >Model Requirements for Sufficient Analysis - There is a need for a better >understanding of the validity of IBIS based results and the context in which they >are computed, i.e. engineering tradeoff simulations, technology selection criteria; >post layout board and system validation for proper device operations, clock and bus performance estimations and validations. There was no resolution at the user >meeting. Suggestion made that a rule of thumb be created for what parameters are needed in the models for them to be sufficient for analysis. > >Syntax & Documentation - each month the sub-committee will present for education >purposes specific syntax and documentation topics. This months topics included >IBIS file revision levels and definition of IBIS min/max/typ. Too much detail >to include here, so request the presentation for the overviews. > > >Topic #2 - Developing an IBIS Model Accuracy Specification - Greg Edlund > > >Members of the Sub-committee include: > >Greg Edlund (Digital Equipment Corporation) >Fawn Engelmann (EMC) >Robert Haller (Digital Equipment Corporation) >Bruce Heilbrunn (Stratus) >Peter Laflamme (Fairchild) > >A coupe of quick comments: > >Accuracy means agreement between model prediction and lab measurements. > >If models are not accurate, then designers will be focusing on model >validation verses the issues of high speed design which is the wrong >focus for development. Semiconductor manufacturers will loose business >as their customers struggle with unpredictable hardware. End users will >loose confidence in system and semiconductor products. There must >be a way to work with the IBIS community to help make the models accurate. > >Specification Skeleton - > Relevant model parameters (level 1) > Minimum set of test loads > Measurement methodology > test vehicle > instrumentation > data-taking techniques > Comparison metric and associated software > Characterization report > >Level model of accuracy - Level 3 considered most accurate > >1. Typical silicon vs. typical IBIS with best-guess corners >2. Typical silicon vs. typical IBIS, SPICE corners vs. IBIS corners >3. Corner silicon vs. IBIS corner simulation > >Short-term Goals - >1. Gauge the interest level of the IBIS community at large >2. Establish communications with semiconductor and EDA vendors on the IBIS > Committee to keep our sub-committee in "low-earth orbit" >3. Establish a set of check-points in the development of an accuracy specification >4. Identify a semiconductor house interested in working with us > > >Topic # 3 Other Business > >Kathy Breda of NESA will be making the IBIS distribution list available to everyone. > >We want to coordinate communications more with the IBIS Forum > >Next meeting will be held at EMC on February 12, 1998 at 3:00 PM, details to >follow shortly. Ed and other attendees of the IBIS summit will report back >on their discussions at next month's meeting. > >Regards, > > Kathy Breda & Ed Sayre > From owner-ibis Fri Jan 30 16:58:08 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [137.202.128.5]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id QAA24916; Fri, 30 Jan 1998 16:58:07 -0800 (PST) Received: from emicx.wv.mentorg.com by newsgw.mentorg.com (8.6.8.1/CF5.22R) id QAA12372; Fri, 30 Jan 1998 16:55:31 -0800 Received: from bob by emicx.wv.mentorg.com (8.7.5/CF5.38R) id QAA20489; Fri, 30 Jan 1998 16:55:29 -0800 (PST) From: bobr@emicx.mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA05456; Fri, 30 Jan 98 16:55:35 PST Date: Fri, 30 Jan 98 16:55:35 PST Message-Id: <9801310055.AA05456@bob> To: ibis-users@eda.org, ibis@eda.org, si-list@silab.eng.sun.com Subject: EUROPEAN IBIS SUMMIT - 2nd Call To all: This is a second call to the European IBIS Summit Meeting for participation. While we tentatively have 10 presentations (see below), we do have room for several more. We have nearly 30 people signed up so far and we anticipate a very interesting and informative exchange of ideas. So if you are interested in doing a presentation or in participating, please respond to the notice below. Note, some of the information in the Announcement is updated from the original announcement. Best Regards Bob Ross Interconnectix BU of Mentor Graphics E U R O P E A N I B I S S U M M I T M E E T I N G S E C O N D A N N O U N C E M E N T Time/Date: 9 AM - 5 PM, Thursday, February 26, 1998 Location: Concorde-Lafayette Hotel (Adjacent to Le Palais des Congress de Paris Porte Mailot - Site of the DATE98 Conference) Paris, France Content: Presentations and Discussions Purpose: Solicit and Exchange IBIS Model Related Information and Ideas. Sponsors: Mentor Graphics, Cadence, High Design Technology DATE98 Show: DATE98 - February 23-26, 1998. The IBIS meeting is scheduled the day following the last day of the trade show portion of the Conference. See www.date-conference.com for more information. PCB Symposium: An all day symposium is scheduled Wednesday, February 25, 1998, 10 AM - 4 PM on PCB design issues. This is being co-organized by seven EDA vendors: Cadence, Incases, Mentor Graphics, VeriBest, Viewlogic, Xynetix, and Zuken-Redac. An informative, vendor-neutral program and panel sesson is scheduled. Plan to include DATE98, the PCB Symposium, and the IBIS Summit Meeting in your visit. Registration is required. You can register through several EDA vendors in Europe, through the DATE98 web site or else by e-mail to cweiss@cadence.com BACKGROUND As a result of regular EIA IBIS Open Forum meetings since 1993, IBIS Version 2.1 has been ratified both nationaly (in the United States of America) as ANSI/EIA-656 and internationally as IEC 62014-1. Most of the IBIS are conducted on a regular basis via teleconferencing, but the EIA IBIS Open Forum also conducts two face-to-face meetings every year at the Design Automation Conference (DAC) and DesignCon locations. While some of the IBIS Summits focused on resolving standards issues, others have been used for general IBIS information exchange. Historically, some of the IBIS advances have come from such exchanges. Because of wide-spread international usage and acceptance of IBIS, the EIA IBIS Open Forum will hold a European IBIS Summit at the same time as the DATE98 Conference and PCB Symposium in Paris, France. We are particularly interested the international experiences and ideas at this IBIS Summit. CALL FOR PARTICIPANTS People involved in IBIS Model development, EDA tool development, and digital circuit design are invited to participate in the European IBIS Summit meeting. If you plan to participate, please register with the information below (deadline, February 13, 1998): Name: E-mail address: Company: Telephone: Send to: Bob Ross (bob_ross@mentorg.com) or Karine Loudet (karine_loudet@mentorg.com) +33-1-3067-1912 CALL FOR PRESENTATIONS We are seeking presentations from individuals who have IBIS experiences or issues. We currently have about 10 tentively planned presentation, but can accept several more. See below for what is currently planned. Format of Presentation: Overhead Projections Time: 15-30 Minutes Electronic Archival: We request electronic versions so that the presentations can be archived and also made available to non-attendees. Formats used in the past have been text, Power Point, Word, Postscript, and Acrobat. Electronic presentations should be made available by February 13, 1998. Otherwise the presentor will be expected to provide 50 copies for distribution. If you plan a presentation, please supply Title: Presenter: E-mail address: Company: Telephone: Estimate Time: Send this to: Bob Ross (bob_ross@mentorg.com) AGENDA The agenda includes presentations, discussions, breaks, and a buffet luncheon (which will be provided). Our tenative set of presentations include: Bob Ross, Interconnectix BU of Mentor Graphics, USA Welcome, EIA IBIS Open Forum Overview Christian Marot, Siemens, France IBIS Models and EMC Simulation Standardization Status Werner Rissiek, Incases, Germany IBIS and Radiation Analysis Razvan Ene, High Design Technology, Italy IBIS Models for EMC and High-Frequency Devices Prakash Radhakrishnan, Intel, USA Challenges in Using IBIS in High Frequency Applications Bernhard Unger, Siemens, Germany SI-Analysis with HSPICE Based on IBIS Behavioral Models C. Kumar, Cadence, USA Problems in V-T Curve Modeling and Simulation Syed Huq, National Semiconductor, USA IBIS Model Development at National Semiconductor John Fitzpatrick, Alcatel, France Use of IBIS in Alcatel Gerald Bannert, Siemens, Germany Required IBIS Enhancements FOR FURTHER INFORMATION: Bob Ross, Chair, EIA/IBIS Open Forum Interconnectix Business Unit, Mentor Graphics 8005 S.W. Boeckman Road Wilsonville, Oregon 97070 USA (503) 685-0732 bob_ross@mentorg.com