From owner-ibis  Tue May  4 08:38:49 1999
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Date: Tue, 04 May 1999 17:32:54 +0200
From: Frank AZEMA <franck.azema@sxb.bsf.alcatel.fr>
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To: IBIS Group Questions <ibis-users@eda.org>
Subject: spice convertion to ibis , help.
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Dear Ibis Users,

I need help to convert spice model from download manufacturer site to
IBIS model.

I have download the s2ibis2 software and i recompile it with the fix.
I have the spectre generator and the spice3 generator. ( no hspice or
spice generator : where can i find this other generator?)

I can generate the examples models from the s2ibis2 software and i have
understand what i need to make a pre-model file ( *.s2i) before running
s2ibis2.
But i don't understand the reason why it is necessary to have 2 models
files : spectre.mod + buffer.sp (ex1 and other)

Generally , manufacturers provide only one file which is *.mod or *.cir
or *.lib but i don't know the different.

Someone could help me on this topics ?

I thank everyone to answer.

Regards,


--
Frank AZEMA                      ALCATEL BUSINESS SYSTEM
Technical Direction             1 rt du Dr A. Schweitzer
Tel:+33(0)3.88.67.77.00    67000 ILLKIRCH Cedex - France
Fax:+33(0)3.88.67.70.83  Franck.Azema@sxb.bsf.alcatel.fr



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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
Dear Ibis Users,
<p>I need help to convert spice model from download manufacturer site to
IBIS&nbsp;model.
<p>I have download the s2ibis2 software and i recompile it with the fix.
<br>I have the spectre generator and the spice3 generator. ( no hspice
or spice generator : where can i find this other generator?)
<p>I can generate the examples models from the s2ibis2 software and i have
understand what i need to make a pre-model file ( *.s2i) before running
s2ibis2.
<br>But i don't understand the reason why it is necessary to have 2 models
files : spectre.mod + buffer.sp (ex1 and other)
<p>Generally , manufacturers provide only one file which is *.mod or *.cir
or *.lib but i don't know the different.
<p>Someone could help me on this topics ?
<p>I thank everyone to answer.
<p>Regards,
<br>&nbsp;
<pre>--&nbsp;
Frank AZEMA&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ALCATEL BUSINESS SYSTEM
Technical Direction&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1 rt du Dr A. Schweitzer
Tel:+33(0)3.88.67.77.00&nbsp;&nbsp;&nbsp; 67000 ILLKIRCH Cedex - France
Fax:+33(0)3.88.67.70.83&nbsp; Franck.Azema@sxb.bsf.alcatel.fr</pre>
&nbsp;</html>

--------------492EACB8D597E3000485827C--

From owner-ibis  Tue May  4 10:55:42 1999
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Date: Tue, 4 May 1999 10:49:31 -0700 (PDT)
From: Syed Huq <shuq@cisco.com>
Reply-To: Syed Huq <shuq@cisco.com>
Subject: Re: spice convertion to ibis , help.
To: ibis-users@eda.org, franck.azema@sxb.bsf.alcatel.fr
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Frank,

See my responses below:

> 
> I have download the s2ibis2 software and i recompile it with the fix.
> I have the spectre generator and the spice3 generator. ( no hspice or
> spice generator : where can i find this other generator?)
> 

In your .s2i file, you have a keyword [Spice type]. This determines which
SPICE engine you wish to envoke. Below is a listing of the supported SPICE
engines.

 [Spice type]    spicetype

        spicetype = HSpice, PSpice, Spice2, Spice3, or Spectre

If you wish to use HSpice and the tool is available at your site, edit
the word 'spicetype' and replace with HSpice
 

> I can generate the examples models from the s2ibis2 software and i have
> understand what i need to make a pre-model file ( *.s2i) before running
> s2ibis2.
> But i don't understand the reason why it is necessary to have 2 models
> files : spectre.mod + buffer.sp (ex1 and other)
> 
> Generally , manufacturers provide only one file which is *.mod or *.cir
> or *.lib but i don't know the different.
> 

Typically the .sp file has the nodal information. THis can be equiv to a .cir
file or a .ckt file as well. Within the .sp file, you can call out your 
libraries and subcircuits. All these various types of extension simply point
to all the various flavors of SPICE we have, each using it's own definations.

The .mod file is where all your process information are stored.

Sometimes, a manufacturer can combine all this in one file like you mentioned.

Hope this helps.
Regards,
Syed
Cisco Systems, Inc

From owner-ibis  Tue May  4 14:47:00 1999
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From: "Barnes, Larry" <Larry.Barnes@lsil.com>
To: "'ibis-users@eda.org'" <ibis-users@eda.org>
Subject: SE and diff drivers on same pin
Date: Tue, 4 May 1999 15:37:31 -0600 
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I'm trying to construct a model of a SCSI-2 part.  SCSI-2 data pins are
either differential or single-ended depending on what bus is detected by the
part.  

I was planning on using the model selector to assign either the SE or diff
driver to the correct pin.  BUT I am in a quandary where to place the Diff
Pin definitions.  

Also the I-V curves of the differential pins are not exact mirrors of each
other, so I have set of data available for each side of the diff driver.

I guess I could defined two complete components in the file, one
single-ended usage and one for differential.  But I still have a question as
to how to implement the Diff Pin definitions

Any suggestions would be appreciated.



Regards,
Larry Barnes
larry.barnes@lsil.com

From owner-ibis  Wed May  5 05:23:17 1999
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From: =?Big5?B?rUqrVK7R?= <CSHu@elitemt.com.tw>
To: ibis-users@eda.org
Subject: ibis-spice conversion in win98 
Date: Wed, 5 May 1999 20:16:49 +0800
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Dear All
	I have some questions about SDRAM IBIS model creation.
1. Can I use Hspice (DOS ver) and s2ibis2 (win95 ver) in win98 to make
ibis file?
2. Where can i find examples which close to SDRAM's *.s2i file, Because
i don't know how to write a *.s2i file correctly?
3. What's the relationship between *.sp, *.spi and *.s2i in the step of
making ibis? 
4. If i want to extract the ramp rate data of SDRAM (LVTTL), what kind
of input waveform  must be applied to
    the input node (perfect step function from 0-3.3v (3.3v-0) or
1ns/1ns rise/fall time waveform) ?
5. How to define the v_fixture of  LVTTL system and it will be added to
simulation the rising/falling waveform
     or not?

I need your help
thanks
Best Regards
Chris Hu
    

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<BODY>
<P><FONT SIZE=3D1>Dear All</FONT>
<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <FONT SIZE=3D1>I have =
some questions about SDRAM IBIS model creation.</FONT>
<BR><FONT SIZE=3D1>1. Can I use Hspice (DOS ver) and s2ibis2 (win95 =
ver) in win98 to make ibis file?</FONT>
<BR><FONT SIZE=3D1>2. Where can i find examples which close to SDRAM's =
*.s2i file, Because i don't know how to write a *.s2i file =
correctly?</FONT></P>
<P><FONT SIZE=3D1>3. What's the relationship between *.sp, *.spi and =
*.s2i in the step of making ibis? </FONT>
<BR><FONT SIZE=3D1>4. If i want to extract the ramp rate data of SDRAM =
(LVTTL), what kind of input waveform&nbsp; must be applied to</FONT>
<BR><FONT SIZE=3D1>&nbsp;&nbsp;&nbsp; the input node (perfect step =
function from 0-3.3v (3.3v-0) or 1ns/1ns rise/fall time waveform) =
?</FONT>
<BR><FONT SIZE=3D1>5. How to define the v_fixture of&nbsp; LVTTL system =
and it will be added to simulation the rising/falling waveform</FONT>
<BR><FONT SIZE=3D1>&nbsp;&nbsp;&nbsp;&nbsp; or not?</FONT>
<BR>
<BR><FONT SIZE=3D1>I need your help</FONT>
<BR><FONT SIZE=3D1>thanks</FONT>
<BR><FONT SIZE=3D1>Best Regards</FONT>
<BR><FONT SIZE=3D1>Chris Hu</FONT>
<BR><FONT SIZE=3D1>&nbsp;&nbsp;&nbsp;</FONT>
</P>

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From owner-ibis  Wed May  5 06:57:00 1999
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From: "Beal, Weston" <Weston.Beal@COMPAQ.com>
To: "'ibis-users@eda.org'" <ibis-users@eda.org>
Subject: RE: SE and diff drivers on same pin
Date: Wed, 5 May 1999 08:50:44 -0500 
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Larry,

Defining the differential pins with different drivers is no problem.  You
just assign the appropriate model in the pin list and then define the pins
as differential in the diff pin block.  I think that IBIS allows you to use
model selector and diff pin on the same pins, but it is likely to confuse
half the simulators, or simple not be supported.  I've seen this type of
device before in IBIS and the manufacturer defined it as two different
devices.  This is your best bet, I think.

Regards,
Weston Beal
Signal Integrity Engineer
Compaq Computer Corp.

		-----Original Message-----
		From:	Barnes, Larry [mailto:Larry.Barnes@lsil.com]
		Sent:	Tuesday, 04 May, 1999 4:38 PM
		To:	'ibis-users@eda.org'
		Subject:	SE and diff drivers on same pin

		I'm trying to construct a model of a SCSI-2 part.  SCSI-2
data pins are
		either differential or single-ended depending on what bus is
detected by the
		part.  

		I was planning on using the model selector to assign either
the SE or diff
		driver to the correct pin.  BUT I am in a quandary where to
place the Diff
		Pin definitions.  

		Also the I-V curves of the differential pins are not exact
mirrors of each
		other, so I have set of data available for each side of the
diff driver.

		I guess I could defined two complete components in the file,
one
		single-ended usage and one for differential.  But I still
have a question as
		to how to implement the Diff Pin definitions

		Any suggestions would be appreciated.



		Regards,
		Larry Barnes
		larry.barnes@lsil.com
From owner-ibis  Wed May  5 08:34:29 1999
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From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
To: "'ibis-users@eda.org'" <ibis-users@eda.org>
Subject: RE: SE and diff drivers on same pin
Date: Wed, 5 May 1999 08:27:02 -0700 
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Larry,

It seems to me that you would like to use the [Model Selector] to be able to
switch between the differential and single ended mode of the buffer.  You
are
right, this would only be possible if the [Diff Pin] keyword (or a similar)
function could be inside the [Model Selector].  Unfortunately this can't be
done currently.  I would suggest to use the comment character before the
line
that defines the pins of interest as differential in the [Diff Pin] section
for
the single ended mode, and no comment character for the differential mode.

I am just curious, are there a lot of devices like this out there?  If so,
we
should probably find an IBIS solution for this case.  This could be brought
up
in one of the Open Forum meetings, if necessary.

Arpad
============================================================================
==

-----Original Message-----
From: Beal, Weston [mailto:Weston.Beal@COMPAQ.com]
Sent: Wednesday, May 05, 1999 6:51 AM
To: 'ibis-users@eda.org'
Subject: RE: SE and diff drivers on same pin


Larry,

Defining the differential pins with different drivers is no problem.  You
just assign the appropriate model in the pin list and then define the pins
as differential in the diff pin block.  I think that IBIS allows you to use
model selector and diff pin on the same pins, but it is likely to confuse
half the simulators, or simple not be supported.  I've seen this type of
device before in IBIS and the manufacturer defined it as two different
devices.  This is your best bet, I think.

Regards,
Weston Beal
Signal Integrity Engineer
Compaq Computer Corp.

		-----Original Message-----
		From:	Barnes, Larry [mailto:Larry.Barnes@lsil.com]
		Sent:	Tuesday, 04 May, 1999 4:38 PM
		To:	'ibis-users@eda.org'
		Subject:	SE and diff drivers on same pin

		I'm trying to construct a model of a SCSI-2 part.  SCSI-2
data pins are
		either differential or single-ended depending on what bus is
detected by the
		part.  

		I was planning on using the model selector to assign either
the SE or diff
		driver to the correct pin.  BUT I am in a quandary where to
place the Diff
		Pin definitions.  

		Also the I-V curves of the differential pins are not exact
mirrors of each
		other, so I have set of data available for each side of the
diff driver.

		I guess I could defined two complete components in the file,
one
		single-ended usage and one for differential.  But I still
have a question as
		to how to implement the Diff Pin definitions

		Any suggestions would be appreciated.



		Regards,
		Larry Barnes
		larry.barnes@lsil.com
From owner-ibis  Wed May  5 10:07:02 1999
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Subject: Re: ibis-spice conversion in win98
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­J«T®Ñ wrote:

>
>
> Dear All
>         I have some questions about SDRAM IBIS model creation.
> 1. Can I use Hspice (DOS ver) and s2ibis2 (win95 ver) in win98 to make
> ibis file?

Yes, as long as the batch file makes the correct dos command line
call to hspice.

>
> 2. Where can i find examples which close to SDRAM's *.s2i file,
> Because i don't know how to write a *.s2i file correctly?

There are examples in the s2ibis2 source code on the ibis web site.

>
>
> 3. What's the relationship between *.sp, *.spi and *.s2i in the step
> of making ibis?

.s2i is the s2ibis2 control file
.sp is your original spice file that has been modified by you to
     easily interface to the .s2i file spice calls.
.spi are the spice files that s2ibis2 creates to perform simulation
      these are created from the .s2i file and the .sp file, along with
      the .mod file
.mod contains the process information. This is often supplied by a
      manufacturer as a seperate set of process decks.  If there are not

      seperate decks, then you have to create files with calls to the
      appropriate library files.


>
> 4. If i want to extract the ramp rate data of SDRAM (LVTTL), what kind
> of input waveform  must be applied to
>     the input node (perfect step function from 0-3.3v (3.3v-0) or
> 1ns/1ns rise/fall time waveform) ?
>

In general, you can let s2ibis2 generate a default input ramp waveform,
since most models supplied by vendors are full transistor models, they
will perform some sort of wave shaping.

> 5. How to define the v_fixture of  LVTTL system and it will be added
> to simulation the rising/falling waveform
>      or not?
>

For standard totem pole outputs, four waveform tables need to be
generated, as follows:

Rising waveform, Vfixture = 0, Rfixture = nominal trace impedance
Rising waveform, Vfixture = Voh(max), Rfixture = nominal trace impedance

Falling waveform, Vfixture = 0, Rfixture = nominal trace impedance
Falling waveform, Vfixture = Voh(max), Rfixture = nominal trace
impedance

Voh(max) is usually the supply voltage.  As a result, you need to
also specify the Vfixture_min and Vfixture_max, which are consistant
with the voltages used to generate the IV curves.

Also, it is common for a device to drive multiple trace impedances on a
board,
or on multiple boards.  When this is the case, multiple sets of Rising
and
Falling waveforms must be created to cover the reasonable range of
transmission line impedances that a device will drive.  Multiples of 5
or 10
ohms are common. (i.e. 30,40,50,60,70,80 ohms)  For example, if the
nominal board trace impedance is 60 ohms and a driver is at the end of a

line, then it is driving a 60 ohm load.  However, if the driver is in
the middle
of a line, it is driving a 30 ohm load.  For the best simulation
accuracy, it
is best to have two sets of waveform tables to use, one generated at a
60 ohm load, and the other at a 30 ohm load.

Regards,

Scott

>
> I need your help
> thanks
> Best Regards
> Chris Hu
>

From owner-ibis  Wed May  5 10:14:35 1999
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Date: Wed, 05 May 1999 10:08:50 +0000
To: ibis-users@eda.org
From: Matthew Flora <mbflora@hyperlynx.com>
Subject: RE: SE and diff drivers on same pin
In-Reply-To: <4575832C8E71D111AC4100A0C96B512703BB0BC7@fmsmsx36.fm.intel
 .com>
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Dear Larry, Arpad,

>It seems to me that you would like to use the [Model Selector] to be able to
>switch between the differential and single ended mode of the buffer.  You
>are right, this would only be possible if the [Diff Pin] keyword (or a
>similar) function could be inside the [Model Selector].  Unfortunately this
>can't be done currently.  I would suggest to use the comment character before
>the line that defines the pins of interest as differential in the [Diff Pin]
>section for the single ended mode, and no comment character for the
>differential mode.

As annoying as it is to build two separate models, I would advocate doing that
rather than commenting out various sections of the model depending on what
"mode" the user desires.

Would you, as a user, like being forced to modify a model file in order to use
it?  Sounds tedious and "unfriendly".  In my experience, many of the folks
using IBIS models know nothing about IBIS (and don't necessarily want to if
they don't have to).

I realize the maintenance burden goes up having to support two models, even if
they are in the same file.  But consider that the maintenance burden affects
only a couple of people in your organization for a limited time, while
potentially hundreds of users would be saved having to edit the model file(s),
perhaps multiple times each.  Remember that your models are likely to be in
use in the field much, much longer than it takes you to build/maintain them.

Regards,
Matthew Flora
Senior Engineer
HyperLynx
(425) 869-2320 PH
(425) 881-1008 FAX
mbflora@hyperlynx.com
17641 NE 67th Court, Redmond, WA 98052 USA
From owner-ibis  Wed May  5 14:08:45 1999
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Date: Thu, 6 May 1999 00:02:52 +0300 (IDT)
From: Sabbag Erez <sabbage@techst02.technion.ac.il>
To: ibis-users@eda.org
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Please, remove me form the ibis-users@eda.org mailing list.
Thanks.


Erez Sabbag,
E-mail:sabbage@t2.technion.ac.il
       

From owner-ibis  Tue May 11 02:25:01 1999
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From: =?Big5?B?rUqrVK7R?= <CSHu@elitemt.com.tw>
To: ibis-users@eda.org
Subject: s2ibis2 operating process in DOS
Date: Tue, 11 May 1999 17:18:08 +0800
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Dear All
	I met some faults in running s2ibis2, i hope someone can teach
me how to solve the problems.
1. How to modify the HSPICE.BAT and HSPICE.PIF files to meet the DOS
version HSPICE?
     Because the program always fail in the HSPICE operation	item and
the automatically generated *.spi file
     can be exeicuted in individual dir..

2. The INPUT and ENABLE pins are the circuit internal pins not the IC
signal name for DRAM OCD circuit.
     I force INPUT and ENABLE to replace two NC pin and set as NoModel.
Does it will cause any problem
     in executing s2ibis2.
3. What's the latest version of s2ibis2 of win95 (1.0 ) ?

Regards
ChunShu Hu	 
       

------ =_NextPart_001_01BE9BD2.3F5A42F0
Content-Type: text/html
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">
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</HEAD>
<BODY>
<P><FONT SIZE=3D1>Dear All</FONT>
<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <FONT SIZE=3D1>I met =
some faults in running s2ibis2, i hope someone can teach me how to =
solve the problems.</FONT>
<BR><FONT SIZE=3D1>1. How to modify the HSPICE.BAT and HSPICE.PIF files =
to meet the DOS version HSPICE?</FONT>
<BR><FONT SIZE=3D1>&nbsp;&nbsp;&nbsp;&nbsp; Because the program always =
fail in the HSPICE operation&nbsp;&nbsp;&nbsp; item and the =
automatically generated *.spi file</FONT>
<BR><FONT SIZE=3D1>&nbsp;&nbsp;&nbsp;&nbsp; can be exeicuted in =
individual dir..</FONT>
<BR>
<BR><FONT SIZE=3D1>2. The INPUT and ENABLE pins are the circuit =
internal pins not the IC signal name for DRAM OCD circuit.</FONT>
<BR><FONT SIZE=3D1>&nbsp;&nbsp;&nbsp;&nbsp; I force INPUT and ENABLE to =
replace two NC pin and set as NoModel. Does it will cause any =
problem</FONT>
<BR><FONT SIZE=3D1>&nbsp;&nbsp;&nbsp;&nbsp; in executing =
s2ibis2.</FONT>
<BR><FONT SIZE=3D1>3. What's the latest version of s2ibis2 of win95 =
(1.0 ) ?</FONT>
<BR>
<BR><FONT SIZE=3D1>Regards</FONT>
<BR><FONT SIZE=3D1>ChunShu =
Hu&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</FONT>
<BR><FONT SIZE=3D1>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</FONT>
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From owner-ibis  Wed May 12 05:17:10 1999
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From: Recherche Developpement <rech_dev@centralp.fr>
To: "'vbspice2ibis@veribest.com'" <vbspice2ibis@veribest.com>
Cc: "'ibis-users@vhdl.org'" <ibis-users@vhdl.org>
Subject: Request of informations about components
Date: Wed, 12 May 1999 14:10:20 +0200
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Dear Sir,

I currently have a big problem.

I must do an Ibis file for the circuit following : 
"CDC391 (T.I.) package ITS16" in output,
"74F374 (T.I.) package SOL20" in output,
"74ABT821 (T.I.) package SOL24" in output.

I only know very few things on the characteristics of these components : 
- their inductance of package L_pkg, 
- their capacity of package C_pkg, 
- their capacity internal I/O C_I/O, 
- their rising time / falling time (tr/tf) at output, 
- and their resistance of output.

I would wish to make a model spice for then making a model ibis by using S2ibis.

Could you help me by saying to me if it is possible to achieve this goal.

Best regards.

Fabrice COQ


From owner-ibis  Wed May 12 10:13:33 1999
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Date: Wed, 12 May 1999 10:07:38 +0000
To: ibis@eda.org, ibis-users@eda.org
From: Matthew Flora <mbflora@hyperlynx.com>
Subject: DAC99 IBIS Summit
Mime-Version: 1.0
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                  D A C   I B I S   S U M M I T   M E E T I N G
                       F I R S T   A N N O U N C E M E N T

DATE:      Monday, June 21, 1993
TIME:      8:30 AM - Afternoon

CITY:      New Orleans, Louisiana

LOCATION:  Hilton Hotel, New Orleans Riverside, next to Ernest N. Morial
           Convention Center where the Design Automation Conference (DAC)
           is being held.

ROOM:      Chequers

LUNCH:     Refreshments and Lunch will be provided.

AGENDA:    The agenda is being planned.  Some planned items are:

           SP-4557 Letter Ballot Comment Resolution based on comments
           received to date on pending standardization of IBIS Version 3.2.

           Election of Officers for 1999-2000.

           Presentations and Discussions on IBIS Topics.  So far, tentative
           presentations are expected on Equation based models and IMIC.
           We are open to several more.

           Discussion on major IBIS 4.0 requirements.

DAC:       DAC is scheduled Monday - Friday, June 21 -25, 1999.  The
           exhibitor portion is open from 10 AM to 6 PM on Monday - Wednesday.
           So there should be time after the IBIS Summit meeting to visit the
           show.  For more information on DAC99 activities, housing, etc.
           visit the DAC99 URL.

DAC URL:   http://www.dac.com/


CALL FOR PRESENTATIONS:

           We are also open to technical presentations related to any current
           IBIS activity and to future IBIS needs.  We already have several
           presentations planned.
 
           Contact Matthew Flora regarding your presentation:

              Presenter:
              Title:
              Estimated Time:

           We would like you to provide handouts for the meeting (about 25)
           and also an electronic copy for archiving.
          

CALL FOR ATTENDEES:

           Please let Matthew Flora know if you are planning to attend so
           we have an estimate on food requirements. 

CONTACT:   Matthew Flora
           mbflora@hyperlynx.com
           (425) 869-2320

From owner-ibis  Thu May 13 16:56:36 1999
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From: "Montoya, Silvia" <Silvia.Montoya@actel.com>
To: "'ibis-users@eda.org'" <ibis-users@eda.org>
Cc: "Montoya, Silvia" <Silvia.Montoya@actel.com>
Subject: Diode Modeling in SPICE
Date: Thu, 13 May 1999 16:50:24 -0700
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Hello IBIS model makers !

   I have a 5V CMOS I/O tristate-able buffer I'm trying to model.  The IBIS
curves generated by s2ibis2 are a very good match
   to measured data  between 0.7v up to about 5.9v.  But between -5V to 0.7v
and  5.9v to 10v the curves deviate quite a bit.
   I've disabled the parasitic diodes in the nmos and pmos device models (
IS=0 ) and added n+ and p+ parasitic diodes to the 
   netlist.  I've been playing with the n+ and p+ diode model (level 3)
parameters  ( n,  js, ivb, area,  pj  )  trying to match SPICE 
   results to measured data  with limited success.  

   Are there any suggestions for other model parameters to tweek, or maybe
there is something going on with the s2ibis2 SPICE
   sim limits/parameters I'm not aware of  ?
 
  Thanks, 
  The time you spend helping me out is greatly appreciated !

   Silvia Montoya       
  email : silvia.montoya@actel.com
From owner-ibis  Fri May 14 06:41:59 1999
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To: "Montoya, Silvia" <Silvia.Montoya@actel.com>
cc: "'ibis-users@eda.org'" <ibis-users@eda.org>
Message-ID: <85256771.004AA9F1.00@D51MTA10.pok.ibm.com>
Date: Fri, 14 May 1999 08:35:08 -0500
Subject: Re: Diode Modeling in SPICE
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Silvia,

It's been a while since I did this work, so my memory might be a little rusty...

I remember extracting Is and n parameters from lab data for bipolar transistors
a few years ago; this is essentially the same measurement.  We put the data on a
log-log plot.  From the slope you can get n.  The y-axis intercept gives you Is.

Start with the diode equation:

I = Is * {exp [(Vq)/(nkT)] - 1}

If you assume the -1 is negligible and take the natural log of both sides,

ln(I) = ln(Is) + (qV/nkT)

You'll also need some way to measure T.  For a nice graph, see "The PN Junction
Diode," by Gerold Neudeck, Addison-Wesley, 1989, figure 4.7, section 4.2, page
83 in my copy.

I applaud you for your efforts.  I wish all my model providers did this kind of
work!

(Shameless plug for a committee I've been working on:  you can find some useful
information on making accurate IBIS datasheets and documenting your results.
Look under "accuracy" on the IBIS web page.  It's called the IBIS Accuracy Spec,
although nobody is interested in using it as a spec just yet.  It has some great
information on what kind of measurements you can make to validate the accuracy
of the models you provide.)

Greg Edlund
Advisory Engineer, Critical Net Analysis
IBM
3650 Hwy. 52 N, Dept. HDC
Rochester, MN 55901
gedlund@us.ibm.com



"Montoya, Silvia" <Silvia.Montoya@actel.com> on 05/13/99 06:50:24 PM

To:   "'ibis-users@eda.org'" <ibis-users@eda.org>
cc:   "Montoya, Silvia" <Silvia.Montoya@actel.com> (bcc: Gregory R
      Edlund/Rochester/IBM)
Subject:  Diode Modeling in SPICE





Hello IBIS model makers !

   I have a 5V CMOS I/O tristate-able buffer I'm trying to model.  The IBIS
curves generated by s2ibis2 are a very good match
   to measured data  between 0.7v up to about 5.9v.  But between -5V to 0.7v
and  5.9v to 10v the curves deviate quite a bit.
   I've disabled the parasitic diodes in the nmos and pmos device models (
IS=0 ) and added n+ and p+ parasitic diodes to the
   netlist.  I've been playing with the n+ and p+ diode model (level 3)
parameters  ( n,  js, ivb, area,  pj  )  trying to match SPICE
   results to measured data  with limited success.

   Are there any suggestions for other model parameters to tweek, or maybe
there is something going on with the s2ibis2 SPICE
   sim limits/parameters I'm not aware of  ?

  Thanks,
  The time you spend helping me out is greatly appreciated !

   Silvia Montoya
  email : silvia.montoya@actel.com



From owner-ibis  Fri May 14 08:49:48 1999
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To: "Montoya, Silvia" <Silvia.Montoya@actel.com>
cc: "'ibis-users@eda.org'" <ibis-users@eda.org>
Subject: Re: Diode Modeling in SPICE 
In-reply-to: Your message of "Thu, 13 May 1999 16:50:24 PDT."
             <D03DC0494403D1118AB500A02461E687019E2004@sv-msg-01.amer.actel.com> 
Mime-Version: 1.0
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Date: Fri, 14 May 1999 08:43:30 -0700
From: Stephen Peters <sjpeters@ichips.intel.com>


Hello Silvia:

   It's not clear to me from your description if the problem is with the
active curves [Pullup]/[Pulldown] or diode curves [Gnd Clamp]/[PWR clamp],
but if it is the diode curves you may want to add some bulk and metalization
resistance to your model.  In that past, that has done the trick for me.

    Regards,
    Stephen Peters
    Intel Corp.


> Hello IBIS model makers !
> 
>    I have a 5V CMOS I/O tristate-able buffer I'm trying to model.  The IBIS
> curves generated by s2ibis2 are a very good match
>    to measured data  between 0.7v up to about 5.9v.  But between -5V to 0.7v
> and  5.9v to 10v the curves deviate quite a bit.
>    I've disabled the parasitic diodes in the nmos and pmos device models (
> IS=0 ) and added n+ and p+ parasitic diodes to the 
>    netlist.  I've been playing with the n+ and p+ diode model (level 3)
> parameters  ( n,  js, ivb, area,  pj  )  trying to match SPICE 
>    results to measured data  with limited success.  
> 
>    Are there any suggestions for other model parameters to tweek, or maybe
> there is something going on with the s2ibis2 SPICE
>    sim limits/parameters I'm not aware of  ?
>  
>   Thanks, 
>   The time you spend helping me out is greatly appreciated !
> 
>    Silvia Montoya       
>   email : silvia.montoya@actel.com


From owner-ibis  Fri May 14 16:15:26 1999
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Date: Fri, 14 May 1999 16:08:05 -0700
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To: ibis-users@eda.org
Subject: IBIS from HSPICE models using s2ibis2
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I have 2 questions about the process of creating an
IBIS model from an HSPICE model using s2ibis2:

1. The HSPICE model I have uses different libraries to model
   effects of process variations.  As far as I can
   tell, s2ibis2 does not make it possible to switch
   libraries when sweeping through the "min, typ, max"
   sequence.  s2ibis2 appears to only vary supply 
   voltage and temperature to obtain the min, typ
   and max curves, implying that one must run s2ibis2
   3 times and pick the correct voltage/temp variations
   from each run to put together the full set with
   process variations included.  Do I have this right?

2. The HSPICE model I have also includes package parasitics.
   Would I have to remove these for the s2ibis2 run and
   add them in by hand?  Otherwise, I would assume that they
   would affect the rising and falling curves and would
   therefore implicitly be included.

Thanks to anyone who can help.


-- 
Kim Helliwell
Senior CAE Engineer
Acuson Corporation
Phone: 650 694 5030  FAX: 650 943 7260
From owner-ibis  Fri May 14 17:04:54 1999
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From: Arthur Wong <Arthur.Wong@idt.com>
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Date: Fri, 14 May 1999 16:58:49 -0700
Message-Id: <199905142358.QAA13273@hermes.Eng.idt.com>
To: khelliwe@acuson.com, ibis-users@eda.org
Subject: Re: IBIS from HSPICE models using s2ibis2


Kim,
1.  s2ibis2 can model process variations by defining
different transistor models for typ/min/max.

Use the keyword "[Model File]" in your s2ibis2 command file
to define the various models.

2.  Yes, remove the package parasitics from your Hspice models
so that your simulation results won't include these effects.
However, define the parasitics in the s2ibis2 command file
so that they will get transferred to the resulting *.ibs file.

Hope this helps.
Arthur Wong
IDT

> From owner-ibis@server.eda.org Fri May 14 16:14:29 1999
> Sender: "Kim Helliwell" <khelliwe@acuson.com>
> Date: Fri, 14 May 1999 16:08:05 -0700
> From: Kim Helliwell <khelliwe@acuson.com>
> Organization: Acuson
> X-Mailer: Mozilla 4.04 [en] (X11; U; SunOS 5.5.1 sun4u)
> MIME-Version: 1.0
> To: ibis-users@eda.org
> Subject: IBIS from HSPICE models using s2ibis2
> Content-Type> : > text/plain> ; > charset=us-ascii> 
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> 
> I have 2 questions about the process of creating an
> IBIS model from an HSPICE model using s2ibis2:
> 
> 1. The HSPICE model I have uses different libraries to model
>    effects of process variations.  As far as I can
>    tell, s2ibis2 does not make it possible to switch
>    libraries when sweeping through the "min, typ, max"
>    sequence.  s2ibis2 appears to only vary supply 
>    voltage and temperature to obtain the min, typ
>    and max curves, implying that one must run s2ibis2
>    3 times and pick the correct voltage/temp variations
>    from each run to put together the full set with
>    process variations included.  Do I have this right?
> 
> 2. The HSPICE model I have also includes package parasitics.
>    Would I have to remove these for the s2ibis2 run and
>    add them in by hand?  Otherwise, I would assume that they
>    would affect the rising and falling curves and would
>    therefore implicitly be included.
> 
> Thanks to anyone who can help.
> 
> 
> -- 
> Kim Helliwell
> Senior CAE Engineer
> Acuson Corporation
> Phone: 650 694 5030  FAX: 650 943 7260
> 
From owner-ibis  Sat May 15 12:07:34 1999
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Resent-From: Montoya@gonzo.wolfenet.com, Silvia <Silvia.Montoya@actel.com>
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From: Lynne Green <green@wolfenet.com>
To: Silvia.Montoya@actel.com
Subject: FW: Diode Modeling in SPICE
Cc: ibis-users@eda.org

Silvia -

Diode models are notoriously poor at covering both forward and reverse
directions.

Main things to play with are series resistance RS and breakdown
characteristics (BV and IKV).  Tune RS to get a better fit in the forward
direction.  Then the breakdown characteristics can be tuned to get a
better fit in the reverse direction.

If the diode goes into forward punchthrough (junction reaches entirely through
a bulk layer), you may need to do more than this.  That doesn't sound likely
here.

Lynne Green
HyperLynx

-----FW: <D03DC0494403D1118AB500A02461E687019E2004@sv-msg-01.amer.actel.c-----

Date: Thu, 13 May 1999 16:50:24 -0700
From: "Montoya, Silvia" <Silvia.Montoya@actel.com>
To: "ibis-users@eda.org" <ibis-users@eda.org>
Subject: Diode Modeling in SPICE
Cc: "Montoya, Silvia" <Silvia.Montoya@actel.com>

Hello IBIS model makers !

   I have a 5V CMOS I/O tristate-able buffer I'm trying to model.  The IBIS
curves generated by s2ibis2 are a very good match
   to measured data  between 0.7v up to about 5.9v.  But between -5V to 0.7v
and  5.9v to 10v the curves deviate quite a bit.
   I've disabled the parasitic diodes in the nmos and pmos device models (
IS=0 ) and added n+ and p+ parasitic diodes to the 
   netlist.  I've been playing with the n+ and p+ diode model (level 3)
parameters  ( n,  js, ivb, area,  pj  )  trying to match SPICE 
   results to measured data  with limited success.  

   Are there any suggestions for other model parameters to tweek, or maybe
there is something going on with the s2ibis2 SPICE
   sim limits/parameters I'm not aware of  ?
 
  Thanks, 
  The time you spend helping me out is greatly appreciated !

   Silvia Montoya       
  email : silvia.montoya@actel.com

--------------End of forwarded message-------------------------

----------------------------------
E-Mail: Lynne Green <green@wolfenet.com>
Date: 15-May-99
Time: 11:56:01

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From owner-ibis  Wed May 19 10:21:36 1999
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To: ibis-users@eda.org
From: Kathy Breda <breda@nesa.com>
Subject: REMINDER - IBIS User's Meeting - THURSAY 5/20/99 3:00PM
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 REMINDER!!

 IBIS User's Meeting to be held this Thursday -
  Cookies and brownies to be served!

 Let us know if you want to connect by phone and
 we'll make arrangements.
      

       Date:    Thursday, May 20th
       Time:    3:00 PM
       Place:   NESA (Stow, MA)
       Purpose: Get the IBIS User Group
                momentum going again and 
                re-focus our efforts.

 Regards,

    Kathy Breda

p.s.  if you need directions to NESA, either contact
      Kathy Breda (breda@nesa.com) or look on
      our web page - www.nesa.com/contact.html

+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
|       NORTH EAST SYSTEMS ASSOCIATES, INC.       |
|      -------------------------------------      |
|     "High Performance Engineering & Design"     |
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
| Kathy Breda             e-mail: breda@nesa.com |
| NESA, Inc.              http://www.nesa.com/    |
| 636 Great Road          Tel +1.978.897-8787     |
| Stow, MA 01775 USA      Fax +1.978.897-5359     |
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From owner-ibis  Thu May 20 19:16:58 1999
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From: "±Ç¿ø¿Á" <paul@nature.kyungpook.ac.kr>
To: <ibis-users@eda.org>
Subject: please help me.
Date: Fri, 21 May 1999 11:12:41 +0900
Organization: =?EUC-KR?B?sOa6z7Trx9Cxsw==?= =?EUC-KR?B?wPzA2rD4x9Cw+g==?= ASIC Lab.
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Hi.
First, thank you for useful website to study IBIS.
I'm a graduated student of Kyungpook Univ. in South Korea.
These days I study IBIS. 
I want to simulate high frequency circuit.(check signal integrity, ringing effect, etc..)
So I try to anaysis circuit using IBIS model. 
And I try to make model(Spice model) only using IBIS data.

But it's very difficuilt for me. 
I can get IBIS information only ANSI/EIA-656 IBIS Home Page.
So I search for  IBIS information or reference book. 
I searched all web site and amazon book strore but can't find.

Could tell me some information or reference to study IBIS.
Please send mail for me. Anything(Book, Website, Document...) will helpful for me.
Thank you.

Paul from ROK.
From owner-ibis  Fri May 28 05:47:29 1999
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	 <IMCEAFAX-Amul+20PATEL+40+2B49+2061+2096+2058+2026+2060@microprocess.com>,
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