Proposed extension to Section 6b.
Allowing IBIS models as external files.

1) Could rename section to "External Model File Extensions".
2) IBIS Model as external file:
	What file extension (not .ibs, .mod, .buf, .mr1)?
	No change in requirements for declared keywords and subparameters.
	Additional values allowed for some keywords and subparameters.

|
|=============================================================================
|=============================================================================
|
|                                 Section 6b
|
|       M U L T I - L I N G U A L   M O D E L   E X T E N S I O N S
|
|=============================================================================
|=============================================================================
|
| LANGUAGES SUPPORTED:
|
| IBIS files can reference other files which are written using the
|** IBIS model,
| SPICE,
| VHDL-AMS, or Verilog-AMS languages.  In this document, these languages are
| defined as follows:
|
|** IBIS model refers to a [Model] section in IBIS 4.0 syntax.
| "SPICE" refers to SPICE 3, Version 3F5 developed by the University of
| California at Berkeley, California.  Many vendor-specific EDA tools are
| compatible with most or all of this version.
|
|.....
|
| GENERAL ASSUMPTIONS:
|
|
| Ports under [Model]s:
|
| The use of ports under native IBIS must be understood before the multi-
| lingual extensions can be correctly applied.  The [Model] keyword assumes, 
| but does not explicitly require naming ports on circuits.  These ports are 
| automatically connected by IBIS-compliant tools without action by the user.  
| For example, the [Voltage Reference] keyword implies the existence of power 
| supply rails which are connected to the power supply ports of the circuit 
| described by the [Model] keyword.
|
|** If the external model file is an iBIS [Model], then the model is
|** connected in the same way as when the [Model] is within an IBIS file.
|** Ports are not explicitly declared.
|
| ...

|
|=============================================================================
|
| KEYWORD DEFINITIONS:
|
|=============================================================================
|    Keywords:  [External Model], [End External Model]
|    Required:  No
| Description:  Used to reference an external file written in one of the
|               supported languages containing an arbitrary circuit
|               definition, but having ports that are compatible with the
|               [Model] keyword, or having ports that are compatible with the
|               [Model] keyword plus an additional signal port for true
|               differential buffers.
| 
|  Sub-Params:  Language, Corner, Parameters, Ports, D_to_A, A_to_D
| Usage Rules:  The [External Model] keyword must be positioned within a
|               [Model] section and it may only appear once for each [Model]
|               keyword in a .ibs file.  It is not permitted under the
|               [Submodel] keyword.
|
|               [Circuit Call] may not be used to connect an [External Model].
|
|               A native IBIS [Model]'s data may be incomplete if the [Model] 
|               correctly references an [External Model].  Any native IBIS 
|               keywords that are used in such a case must contain
|               syntactically correct data and subparameters according to
|               native IBIS rules.  In all cases, [Model]s which reference
|               [External Model]s must include the following keywords and
|               subparameters:
|
|                  Model_type 
|                  Vinh, Vinl (as appropriate to Model_type)           
|                  [Voltage Range] and/or [Pullup Reference], 
|                    [Pulldown Reference], [POWER Clamp Reference], 
|                    [GND Clamp Reference], [External Reference]
|                  [Ramp]
|
|               In models without the [External Model] keyword, data for
|               [Ramp] should be measured using a load that conforms to the 
|               recommendations in Section 9: Notes on Data Derivation Method.  
|               However, when used within the scope of [External Model], the 
|               [Ramp] keyword is intended strictly to provide EDA tools with
|               a quick first-order estimate of driver switching  
|               characteristics.  When using [External Model], therefore, data
|               for [Ramp] may be measured using a different load, if it
|               results in data that better represent the driver's behavior in
|               standard operation.  Also in this case, the R_load
|               subparameter is optional, regardless of its value, and will be
|               ignored by EDA simulators.  For example, the 20% to 80%
|               voltage and time intervals for a  differential buffer may be
|               measured using the typical differential operating load
|               appropriate to that buffer's technology.  Note that voltage
|               and time intervals must always be recorded explicitly rather
|               than as a reduced fraction, in accordance with [Ramp] usage
|               rules.
|
|               The following keywords and subparameters may be omitted,
|               regardless of Model_type, from a [Model] using [External
|               Model]:
|
|                  C_comp, C_comp_pullup, C_comp_pulldown, C_comp_power_clamp, 
|                    C_comp_gnd_clamp
|                  [Pulldown], [Pullup], [POWER Clamp], [GND Clamp]
|
|
|               Subparameter Definitions:
|
|
|               Language:
|
|**             Accepts "IBIS", "SPICE", "VHDL-AMS", or "Verilog-AMS" as arguments.
|               The Language subparameter is required and must appear only
|               once.
|
|
|               Corner:
|
|               Three entries follow the Corner subparameter on each line:
|
|                  corner_name file_name circuit_name
|
|               The corner_name entry is "Typ", "Min", or "Max".  The
|               file_name entry points to the referenced file in the same
|               directory as the .ibs file.
|
|               Up to three Corner lines are permitted.  A "Typ" line is
|               required.  If "Min" and/or "Max" data is missing, the tool may
|               use "Typ" data in its place.  However, the tool should notify
|               the user of this action.
|
|**             For an external IBIS model file, the three corners can be
|**             entered in the usual typ/min/max column style, or a separate file
|**             can be used for each corner.
|
|               The circuit_name entry provides the name of the circuit to be
|               simulated within the referenced file.  
|**             For IBIS files, this is normally the model name.
|               For SPICE files, this
|               is normally a ".subckt" name.  For VHDL-AMS files, this is
|               normally an "entity(architecture)" name pair.  For Verilog-AMS
|               files, this is normally a "module" name.
|
|               No character limits, case-sensitivity limits or extension
|               conventions are required or enforced for file_name and
|               circuit_name entries.  However, the total number of characters
|               in each Corner line must comply with the rules in Section 3.
|               Furthermore, lower-case file_name entries are recommended to
|               avoid possible conflicts with file naming conventions under
|               different operating systems.  Case differences between
|               otherwise identical file_name entries or circuit_name entries
|               should be avoided.  External languages may not support
|               case-sensitive distinctions. 
|
|
|               Parameters:
|
|               Lists names of parameters that can be passed into an external
|               model file.  Each Parameters assignment must match a name or
|               keyword in the external file or language.  The list of
|               Parameters may span several lines by using the word Parameters
|               at the start of each line.  The Parameters subparameter is
|               optional, and the external model must operate with default
|               settings without any Parameters assignments.
|
|               Parameter passing is not supported in SPICE.  VHDL-AMS
|               parameters are supported using "generic" names, and
|               Verilog-AMS parameters are supported using "parameter" names.
|
|
|               Ports:
|
|               Ports are interfaces to the [External Model] which are
|               available to the user and tool at the IBIS level. They are
|               used to connect the [External Model] to die pads.  The Ports
|               parameter is used to identify the ports of the [External
|               Model] to the simulation tool.  The port assignment is by
|               position and the port names do not have to match exactly the
|               names inside the external file.  The list of port names may
|               span several lines if the word Ports is used at the start of
|**             each line.  Port assignment is automatic for IBIS models,
|**             and must be explicitly declared for all other model types.
|
|...
               
|
|-----------------------------------------------------------------------------
| Example [External Model] using IBIS:
|--------------------------------------
[Model] ExBufferIBIS_1    | one external file for the three corners
Model_type I/O
Vinh = 2.0
Vinl = 0.8
|
| Other model subparameters are optional
|
|                 typ     min    max
[Voltage Range]   3.3     3.0    3.6
|
[Ramp]
dV/dt_r        1.57/0.36n   1.44/0.57n   1.73/0.28n
dV/dt_f        1.57/0.35n   1.46/0.44n   1.68/0.28n
|
[External Model]
Language IBIS
|
| Corner corner_name file_name       circuit_name ([Model] name within external file)
Corner    Typ         buffer_3.xxx   buffer_io     | reads TYP column
Corner    Min         buffer_3.xxx   buffer_io     | reads MIN column
Corner    Max         buffer_3.xxx   buffer_io     | reads MAX column
|
|** Parameters - Not supported in IBIS
|
|** Ports List of port names (not used for IBIS model)
|
|
[Model] ExBufferIBIS_3    | three external files for the three corners
Model_type I/O
Vinh = 2.0
Vinl = 0.8
|
| Other model subparameters are optional
|
|                 typ     min    max
[Voltage Range]   3.3     3.0    3.6
|
[Ramp]
dV/dt_r        1.57/0.36n   1.44/0.57n   1.73/0.28n
dV/dt_f        1.57/0.35n   1.46/0.44n   1.68/0.28n
|
[External Model]
Language IBIS
|
| Corner corner_name file_name       circuit_name ([Model] name within external file)
Corner    Typ         buffer_typ.xxx  buffer_io_typ     | reads TYP column
Corner    Min         buffer_min.xxx  buffer_io_min     | reads MIN or TYP column
Corner    Max         buffer_max.xxx  buffer_io_max     | reads MAX or TYP column
|
|** Parameters - Not supported in IBIS
|
|** Ports List of port names (not used for IBIS model)
|