This directory contains several sub-directories, each with its own
example of how to use s2ibis2. Each sub-directory contains an s2ibis2
command file, a SPICE file, two model files (one for Spectre and one for
HSPICE), and the IBIS file that results from running s2ibis2 using the
other files as input.

Sub-directories and their contents:

    ex1 -   An example of how to create a model for a simple output-only
            buffer. This example uses the [NoModel] switch to create a
            "dummy" input pin that has no model in the IBIS file.

    ex2 -   An example of how a tristate buffer model is built. This
            example uses the [NoModel] switch to create "dummy" input
            and enable pins that have no corresponding models in the
            IBIS file.

    ex3 -   This example shows how to create an IBIS file containing
            models for two different types of output pin (output-only
            buffer and tristate buffer) and an input pin.

    ex4 -   An example of how to use the [Pin map] definition to define
            a multiple-Vdd part. In this case, the clamp diodes use 5V as
            their reference, while the drivers use 3.3V.

    iobuff - This example requires the Cadence Spectre simulator.
	    A SpiTran project file spectre_iobuff.spp is included, as
	    well as the s2ibis settings file spectre_iobuff.s2i.
	    So you can open the project, import the s2ibis settings,
	    and immediately execute the translation. Actually, all of
            the files produced by s2ibis2 are in the project directory
            already, including iobuff.ibs. The SpiTranIntro presentation
            in the doc directory is based on this example.

	    The spice file contains three subckts:

	      .SUBCKT IO_OUT  OUT  DATA  ENA VDD VSS
	      This is the output driver stage. The DATA terminal
	      controls the driver state, and the output appears
	      at OUT. The driver goes into High-Z mode when ENA
	      is low.

	      .SUBCKT IO_IN  OUT  IN VDD VSS
	      This is the input sensor stage. Wire the IN terminal
	      to the OUT terminal of the driver stage, and you have a
	      bi-directional pin. The OUT of this stage is not needed
	      by s2ibis, so it should be wired to a dummy terminator.

	      .SUBCKT IO_TEST_LOAD LOAD
	      This is a dummy load for testing. Do not instantiate this
	      in SpiTran.

	    This is a 5V part, so set VDD to 5 and VSS to 0.

Note that the s2ibis2 command files n the ex1-4 examples specify Spectre
as the simulator and use the model file "spectre.mod". To use HSPICE, change
the spice type and use the file "hspice.mod" as the model file. To do this,
change the s2ibis2 command file so that the "[Spice type]" line reads

[Spice type]    hspice

or whatever simulator you're using, and the "[Model file]" line reads 

[Model file] hspice.mod hspice.mod hspice.mod

If your simulator doesn't support BSIM models, you'll need to use your
own MOSFET transistor models (be sure to name them "nfet" and "pfet").
Alternatively, you could use "dumb" models, such as

.model pfet pmos level=1 vto=-0.9 rd=1 rs=1
.model nfet nmos level=1 vto=0.8 rd=1 rs=1

In either case, the IBIS files you produce will differ from those
included in the example directories.
