3D, or I/V/T models

From: Arpad Muranyi <Arpad_Muranyi@ccm.hf.intel.com>
Date: Mon Sep 20 1993 - 20:16:16 PDT

Hello IBIS folks,

On your request, here is a little summary on the 3D or I/V/T
representation of buffers.

To simplify the following discussion I will only consider the
pulldown part of an output buffer, which is nothing but an Open-Drain
output. In this case the Drain of the transistor is connected to the
output of the buffer, the Source is connected to GND, and the Gate is
driven by the pre-driver circuitry.

With the current V/I curve approach we only characterize the DC steady
state conditions of the transistor after it has been completely
turned on. This means that when we sweep the Drain of the transistor
to obtain a V/I curve, its gate voltage is at maximum (5V).

If we want to characterize the switching characteristics of the
transistor while it is being turned on (i.e. while its gate voltage
is transitioning from 0V to 5V), we would have to take a family of
V/I curves at various gate voltages. There is nothing new in this
idea, most transistor data books publish such family of curves for
both FETs and BJTs. Our problem is that it is very difficult or
impossible to access the voltage waveform on the gate of an output
transistor.

However, we can look at the output current on the Drain as a function
of two variables which are the Gate-Source and the Drain-source
voltages. By the superposition principle, to measure the effects of
the Gate-Source voltage on the output current we can keep the
Drain-Source voltage constant, and to measure the effects of the
Drain-Source voltage we can keep the Gate-Source voltage constant.

In practice, this means that I can measure the output current of a
transistor with respect to time while keeping the output voltage at a
constant level (short circuit into a given voltage) to get the
switching characteristics of the transistor (i.e. the effect of the
Gate-Source voltage waveform with respect to time). The present V/I
measurement method takes care of the other variable, namely the
Drain-Source voltage at a constant Gate-Source voltage, since the
transistor is in a fully turned on steady state with the Gate-Source
voltage being a constant 5V when we sweep it.

If we plot the data measured this way, we can actually generate a 3D
surface-plot. The two horizontal axis represent the independent
variables, one of them being time, and the other the output voltage
(Drain-Source voltage). The vertical axis represents the dependent
variable, the output current. This is where the name comes from: 3D
or I/V/T model.

The nice part of this approach is that the device under test does not
have to be a MOSFET transistor. In fact, it can be anything and we
can treat it as a black box. The surface plot will still fully
describe its characteristics.

The only difficult part is that we must have a current meter that is
extremely fast. There could be several hundred milliamp changes in a
couple of nanoseconds. Such current changes are very susceptible to
parasitic inductances, therefore a careful measurement methodology
must be worked out to obtain correct data.

With the widespread use of the various kinds of slew rate controlled
buffers in the industry, there is an urgent need to find an accurate
modeling method for the switching characteristics. The 3D or I/V/T
characterization method could be useful for more accurate modeling of
traditional buffers as well as slew rate buffers without turning back
to transistor level models.

I would be glad to hear your comments and suggestions.

Sincerely
Arpad Muranyi
Intel, Coprporation
Received on Mon Sep 20 19:11:00 1993

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