Bird 31.1 and 20/80 Spec.

Gentlemen
     
     I have two questions:
     
     1. 20% - 80% Rise/Fall time.. I have to admit, my understanding of
     ECL logic use in the semiconductor industry is somewhat low... but...
     The trend for our customers is a 10-90 Rise/Fall time specification...
     There is a different constant to calculate bandwidth using 20-80. The
     model could use the same structure but reference a different edge rate
     sdue to the different Rise/Fall measurment.
     
     How is a 20-80 Rise/Fall specification more readily extracted in a
     noisy simulation? Does this allow for extra roll of in the "dog leg"
     areas of a digital pulse? Are there "convergance" issues when using IBIS
      solvers?
     
     2. Someday femptoSeconds will be the industry norm.... Is a "all edge
     rate model" pratical (using LCRZk matrices)?
     
     
     
     _gus Panella
     
     apanella@molex.com
Received on Mon May 6 06:35:12 1996