Re: Proposed Golden IBIS Parser checks

From: D. C. Sessions <dc.sessions@vlsi.com>
Date: Wed Nov 04 1998 - 10:43:11 PST

Matthew Flora wrote:

> I'd like to raise for discussion some enhancements I would like to have made
> to the Golden IBIS Parser.

[...]

> Proposed enhancements:

> 2) Generate at least a warning if the Pullup or Pulldown V/I table indicates
> that current is always flowing in one direction. In other words, the V/I
> table does not have an entry with zero current or, by interpolation, the
> current is never zero in the range of the voltages listed.
>
> I think a warning should be generated even if the current would be zero
> when extrapolated to a voltage beyond those listed in the table because I
> believe that V/I tables should be complete and should not force a simulator
> to guess values and, to me, extrapolation beyond the voltages listed in the
> table is a guess.

If I understand you correctly, you would insist that the tables
go at least to the zero-current intercept point. Thus, for an
1.5v device with a weak pullup to 5.0v you'd have the tables go
at least to 5v so as to catch the intercept?

> 3) For non-ECL models, shouldn't the zero current voltage for the Typ, Min,
> and Max columns in the Pullup or Pulldown V/I tables be the same (say
> within a microvolt)? I suggest that a warning be generated if they are
> not.

Lots of technologies have zero-current intercepts inside of their
rails. ECL is only one of them; perhaps you've heard of TTL?

> 4) Related to a topic recently discussed on the reflector, I suggest that an
> error be generated if a differential pin (a pin referenced in the
> [Diff pin] section) is connected to one of the reserved models (POWER, GND,
> or NC).

This would barf on RS-423

-- 
D. C. Sessions
dc.sessions@vlsi.com
Received on Wed Nov 4 10:49:11 1998

This archive was generated by hypermail 2.1.8 : Fri Jun 03 2011 - 09:52:30 PDT