[IBIS-Users] Question about diode model


Subject: [IBIS-Users] Question about diode model
From: Eric Hsu (ehsu@netlogicmicro.com)
Date: Thu Sep 04 2003 - 15:42:15 PDT


Hi Stephen Peters and IBIS expert,

To obtain the accurate ibis model for output buffer, I'd like to know how can I separate junction and bulk resistance for output driver and parasitic diode.
Stephen, when studying your the article, which is "IBIS FORUM I/O BUFFER MODELING COOKBOOK"-- Sep. 24,1997, I found on page 10, you ever mentioned that model creator may need to include junction and bulk resistance for driver and diode separately. If place non-silicide blocking layer to increase drain resistance, I wonder how people can separate them from parasitic diode. Because this parasitic resistance is really high, and it suppose only affect surface conduction current path, but not vertical path through bulk.
Right now, there is only one way I have is insert those parasitic resistance only at source end, which mean, for driver portion, moving drain resistance to source end. Also, inserting all the bulk resistance between P-end of ground clamping diode to GND connection, and N-end of power clamping diode to PWR connection. Of course, it is not perfect idea, because it could cause some different voltage drop from pad to drain and source end.
Any better idea? Or anything wrong from above statement?

Best Regards,

Eric Hsu
Interface Technologies
NetLogic Microsystems, Inc.
450 National Ave.
Mountain View, CA 94043
650-961-6676 x198
This e-mail contains NetLogic Microsystems, Inc. Confidential information


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