Differential inputs and "tdelay"

From: Mirmak, Michael <michael.mirmak@intel.com>
Date: Fri Jun 16 2000 - 16:33:39 PDT

Fellow IBIS-fans,

I have a simple question relating to language used in the 3.2 specification
to describe differential pins. The parameters "tdelay_typ," "tdelay_min"
and "tdelay_max" are described as "launch delays." As such, they seem to be
analogous to pin-to-pin skews on output-only or I/O buffers. However, this
conflicts with the examples cited in the 3.2 specification, which include

[Diff Pin] inv_pin vdiff tdelay_typ tdelay_min
tdelay_max
3 4 150mV -1ns 0ns
-2ns | Input or I/O pair

How can a pair of differential inputs have "launch delays?" Is this a
reference to a max or min mismatch allowed by the device at these pins?

Thanks in advance for any clarity you can lend!

- Michael Mirmak, Intel Corp.
Received on Fri Jun 16 16:35:48 2000

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