Question

Hello,

As I am developing an IBIS model for a chip I have a question to submit :
If one of the pin is connected to two buffers in parallel (the same buffer model for each):
Is it a solution in the IBIS norm to indicate the pin is conected to two buffers in parallel or should I develop a specific pad model for this structure?

Thanks for an answer

  Cyrille CATHELIN
  IC Design Engineer Philips Semiconductors
  Business Line Digital Media - DVI 2, rue de la girafe - BP 5120
  Phone : +33 (0)2 31 45 31 73 14079 Caen Cedex5 - France
  e-mail : cyrille.cathelin@philips.com

 
Received on Wed Nov 29 01:20:31 2000