Fabrizio,
The "Drive-on-Demand" is a circuit Philips uses in the LVT and ALVT BiCMOS families, and we actually call it Current-on-Demand. It differs from the dual impedance outputs found in AVC logic.
The Current-on-Demand (COD) circuit is connected to the output node. During a HIGH to LOW transition, multiple parallel NPN transistors pull down the output. The COD is set to trip at roughly 1.4V. When the output reaches that threshold, the COD
throttles down the base drive to the NPNs to soften the final transition. The I/V curve looks like a conventional bipolar curve instead of an AVC curve that has two impedance zones.
Regards,
Mike Magdaluyo
Logic Products Group
Philips Semiconductors
zanella_fabrizio@emc.com on 09/07/2000 06:26:05 AM
To: bob_ross@mentorg.com@SMTP
cc: ibis-users@eda.org@SMTP
Subject: RE: Drive-on-demand
Classification: Restricted
Bob, DC, are you referring to the double drive devices like AVC logic, which
has fast drive in the 20-80% region and then softens the drive at the
corners? This is a technology we've wanted to evaluate for some time, but
the IBIS standard does not support it yet.
Regards,
Fabrizio Zanella
EMC corporation
fzanella@emc.com
-----Original Message-----
From: Bob Ross [mailto:bob_ross@mentorg.com]
Sent: Thursday, August 31, 2000 9:24 PM
To: ibis@lumbercartel.com
Cc: ibis-users@eda.org
Subject: Re: Drive-on-demand
D.C.:
Based on your description, I do not believe Bus_hold will work
directly. I do not believe simulators will work with
"negative" currents in the tables - meaning doing the
opposite of what is expected or creating a negative
impedance buffer that acts opposite of a conventional buffer.
Opposite polarity I-V tables will probably be flagged
as an error by the ibischk3 parser. Therefore it would
not be legal.
I cannot think of any clever alternative with IBIS
Version 3.2.
However, I believe the new macro language under discussion by
the IBIS Futures Working Group will be able to handle this
situation (this would be a good test case).
Bob Ross
Mentor Graphics
"D.C. Sessions" wrote:
>
> Need to double-check this. It seems that there are standard
> logic components which, on output, sense the output voltage
> and adjust drive current in response.
>
> No, I don't mean bus hold. These parts drive LOW hard when
> the output voltage is above a certain threshold and cut the
> drive when the output is below that threshold. Rising-edge
> drive is similar.
>
> Yes, I know that this is of dubious stability. Nobody asked
> me if they should do it this way, but the manufacturers want
> to make this a JEDEC standard and I'm trying to help them
> put together an IBIS model. Which, as far as I can tell, is
> possible using
>
> Submodel_type Bus_hold
>
> and having negative currents in the [Pulldown] and [Pullup]
> tables.
>
> 1) Have I missed a better way to do this?
> 2) Will this be legal?
> 3) Will this break EDA tools?
>
> --
> D. C. Sessions
> ibis@lumbercartel.com
Received on Thu Sep 7 15:27:19 2000
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