Re: zero risetime in the IBIS model

Hi Aubrey Sparkman:
So even though the translator doesn't complain about the zero rise time in the
driver model, the translator will go "nuts" ehh? So the waveform come after
the simulation will have no meaning ehh?
what do you mean by" ramp data match the VT data"?
thanks alot
Jason Leung

> Jason,
> Even if your simulator's translator doesn't complain, your simulator may go
> nuts and give VERY "interesting" results. Go back to your supplier and
> insist that the ramp data match the VT data.
>
> Aubrey Sparkman
> Signal Integrity
> Aubrey_Sparkman@Dell.com
> (512) 723-3592
>
> > -----Original Message-----
> > From: Adam.Tambone@fairchildsemi.com
> > [mailto:Adam.Tambone@fairchildsemi.com]
> > Sent: Wednesday, April 04, 2001 9:18 AM
> > To: ibis-users@eda.org
> > Subject: Re: zero risetime in the IBIS model
> >
> >
> > Jason,
> >
> > I'm not sure what translator you are using but the
> > HSPICE translator
> > will by default use ramp data for determining switching
> > characteristics in
> > DC and transient analysis. You can specify that the
> > translator use the
> > rising and falling waveform data instead. See Chapter 18 of
> > the Avanti
> > HSPICE User's Manual.
> >
> > Adam Tambone
> > Fairchild Semiconductor
> >
> >
> >
> > Hi everyone:
> > I am trying to verify a IBIS model which consists of a zero rise time
> > for the driver:
> > | variable typ min max
> > dV/dt_r 0/0 0/0 0/0
> > dV/dt_f 2.0448/0.4029n 1.8546/0.4176n
> > 2.1792/0.4102n
> > R_load = 50.0000
> >
> > My question is :does anyone know how the IBIS translator
> > going to handle
> > this situation??
> > thanks alot
> > Best Regards
> > Jason Leung
> >
> >