I guess I feel a little new at this as most of my questions are probably off the wall to anyone whos done much practice with the design tool methodology and mostly I have measurement characterisation background at high speed bus and a bit of rusty theory.
Im uncomfortable with the 50 ohm spec that is always thrown around. Are all lines desinged to this typically unless with heavy drivers (I understand some of hte IO cells on arrays are programmable of can be selected as high or low drivers - tuned to different Zt load speed mix). Does I bis and desing tools just consider this as a spec reference point or is the assumtion all these lines will run as 50 ohm nominal lines.
I read some tables in High performance Printed Circuit Boards (pretty cool: ISBN 0-07-026713-8) which for the lower relatvie permeability and smaller line space that a typical desing may provide in computer hihg speed bus ( consider maybe 6 mil track, 6 mil space on 1 oz copper - its yieldable with practice), suggest a higher Zt.
Also consider actual functional implementable boards at the higher bus speeds (low hundreds per standard architectures. Looking at the waveform at driver relative to reciver on a bidirectional almost never run right at TEM waveshape. Do modeling consider termination loading at end of line (at input) as desireable and this is characteristic impedance at frequency, not just the Rterm? I think you have to figure the resultant of the complex load vector and figure the imaginay term as well as it winds up not very negligible for things Ive seen.
Isnt a better way of verification of properties by startign wiht chip vendor specs, modeling it, and then see where the desing is at in characterisation and then adjust the measured back to the simulation, I dont think many of these come right out on the intial models without iterating a few times unless process scale factors have already been determined. Its just a model that assumes many things. Whats great in characterization method is one can determine much of the actual Zo Co and Ls, as well as Zl, reflection td as flight td and coorelate this to the design model rather than relying on ibis generated to a standard method but ignoring what the board will see. With model difficiencies I dont hear how this gap is being filled yet. $20k Scope or $40k software simulator - flip a coin.
Jeff
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