RE: [IBIS-Users] VHDL-AMS Model

 For clarification, Eldo is a SPICE simulator so it doesn't include the
VHDL-AMS simulator. The integration of Eldo and the VHDL-AMS simulator
(with some others) is called ADMS. At this time HyperLynx LineSim and
BoardSim can use SPICE models and run either Eldo or HSPICE (if you have
HSPICE licensed from Synopsys). In the future HyperLynx will run ADMS
behind the scenes also. About two years ago ICX got the power to run
ADMS under the covers so it can simulate with IBIS, SPICE, VHDL-AMS, and
S-parameters at the same time. As far as I know, this is the first tool
anywhere that can automatically create the netlist from a PCB and run a
simulation with any or all of the above mentioned models and verify the
results against SI and delay constraints.

I hope this isn't considered too product oriented for this list. I just
wanted to make sure that we're talking about the correct features in
this discussion.

-----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of lgreen
Sent: Tuesday, February 01, 2005 8:50 AM
To: 'lee yang'; ibis-users@eda.org
Subject: RE: [IBIS-Users] VHDL-AMS Model

Hello, Lee,

There are a number of simulators that can handle *-AMS with IBIS and
SPICE.
HyperLynx does this using Mentor's "Eldo" simulator. Perhaps others on
this list can comment on HSPICE, SPECCTRAQuest, and other tools.

Links to the standards organizations:
http://www.vhdl.org/analog/ (IEEE 1076.1 Working Group)
http://www.eda.org/verilog-ams/ (Accellera Verilog Analog Mixed-Signal
Group)

Best regards,
Lynne

"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com

-----Original Message-----
From: lee yang [mailto:changly_80@hotmail.com]
Sent: Tuesday, February 01, 2005 5:41 AM
To: lgreen22@mindspring.com; ibis-users@eda.org
Subject: RE: [IBIS-Users] VHDL-AMS Model

Hello Lynne,

Thanks a lot for your prompt responce and the useful information.
Do you have a link or document showing how to model the VHDL-AMS model?
Btw, what tools support the simulation of VHDL-AMS model? Are HyperLynx
and Hspice able to simulate this model?

Thanks again for your excellent support so far.
- Lee

>From: "lgreen" <lgreen22@mindspring.com>
>To: "'lee yang'" <changly_80@hotmail.com>, <ibis-users@eda.org>
>Subject: RE: [IBIS-Users] VHDL-AMS Model
>Date: Mon, 31 Jan 2005 08:40:14 -0800
>
>Hello, Lee,
>
>An excellent question.
>
>VHDL-AMS (and Verilog-AMS) are standards. They support mixed-signal
>modeling. One can express a functional block, such as a MUX or I/O
>buffer, as a digital, analog, or mixed-signal block. Analog blocks can

>be expressed as equations, including if/then controls, which has both
>advantages over table-based models (such as taking into account
>independent variations with Vcc and Temperature).
>
>Starting with IBIS 4.1, VHDL-AMS, Verilog-AMS, and SPICE 3f5 models are

>allowed as model formats for IBIS, under the [Model] keyword. All of
>these can be used as behavioral or structural descriptions of a block,
>such as an I/O buffer or a MUX. Please see the IBIS 4.1 specification
for details.
>
>Best regards,
>Lynne
>
>"IBIS training when you need it, where you need it."
>
>Dr. Lynne Green
>Green Streak Programs
>http://www.greenstreakprograms.com
>425-788-0412
>lgreen22@mindspring.com
>
>
>-----Original Message-----
>From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
>Behalf Of lee yang
>Sent: Sunday, January 30, 2005 9:35 PM
>To: ibis-users@eda.org
>Subject: [IBIS-Users] VHDL-AMS Model
>
>Hi,
>
>Recently I heard about another behavioral model call VHDL-AMS, can
>anyone please give some background about it?
>Since we already have IBIS model, what is the reason we need to use
>VHDL-AMS
>
>model instead? What is the pros and cons compared to IBIS model?
>Thanks and appreciate if someone can shed some light.
>
>-Lee Yang
>

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Received on Tue Feb 1 09:27:06 2005