RE: [IBIS-Users] VHDL-AMS Model

Hi Lee,

You responded directly, but I thought your question would be of interest
to the greater group ...

Your question of ease and accuracy can be answered on several levels.
For instance, assuming you could develop a traditional IBIS 3.x model
for a high-speed source-synchronous serial I/O (note 1), it will take an
enormous amount of time to create a model for each permutation of
configuration. For instance, assume your driver has 4 different voltage
levels, 4 different pre-emphasis levels, 2 different terminations, and 3
different process corners; you have 96 different IBIS models to create.
A VHDL-AMS model would be much easier to develop, and much easier for
your model users to manage the configurations.

(Note 1: I've heard strong arguments both ways on this issue. Since I
don't have any first-hand experience, I won't comment either way. )

On the other hand, there is currently no spice-to-vhdlams tool like
there is spice-to-ibis. So, it is currently up to the model creator to
make the appropriate SPICE simulations of the transistor-level design,
make the appropriate measurements, and build those measurements into a
VHDL-AMS model. In that respect, using spice-to-ibis for a simple IBIS
model would be much easier. Though, hopefully, as the popularity of AMS
grows, spice-to-AMS tools will become available.

As for accuracy, because VHDL-AMS allows more degrees of modeling
freedom, my feeling is that it can be more accurate than IBIS. However,
on well-behaved drivers which fits the IBIS model template well, there
may be no difference in accuracy. On the other hand, since I have no
idea how to model a receiver containing internal equalization in
traditional IBIS, for me, a VHDL-AMS model would be infinitely more
accurate in this application. Likewise, for attempting to use IBIS for
power integrity purposes, etc. In summary, I would say if your model
will fit the traditional IBIS 3.x mold, use traditional IBIS. If not,
consider VHDL-AMS.

You should also be aware that in addition to AMS languages, IBIS 4.1
allows for modeling with Berkeley SPICE primitives. This can be an
easier alternative for someone knowledgeable in SPICE doing some simple
modeling. SPICE versus AMS is somewhat analogous to Unix scripting
versus C programming. Like UNIX scripting, SPICE provides some basic
building blocks that are easy to assemble and run. But also like UNIX,
scripting will run slower, and if your scripting requires more
complexity than is provided in the basic UNIX commands, it can be
difficult or impossible to accomplish your task without someone creating
another UNIX command for you (most likely, in C). In the case of SPICE,
you would need to convince your SPICE tool vendor of the need for the
additional building block, then wait for them to implement and release
the new feature (then hope that all SPICE vendors follow suit so your
model will be relatively universal). In the case of AMS, if you need
some additional functionality, you just add it to your model. Since the
AMS language is self contained, anything you add to the model will be
immediately available to anyone using a simulator which supports the
IBIS 4.1 VHDL-AMS standard.

Speaking of support, I believe Mentor Graphics is currently the only EDA
vendor who currently supports an AMS language in an SI tool. But, I
also understand that the other two major EDA vendors have working
VHDL-AMS simulators in-house. So, hopefully they will all be porting
these to their SI tools in the future.

I hope that helps,

Gary

  
 
-----Original Message-----
From: lee yang [mailto:changly_80@hotmail.com]
Sent: Tuesday, February 01, 2005 7:46 AM
To: Pratt, Gary
Subject: RE: [IBIS-Users] VHDL-AMS Model

Hi Gary,
Appreciate the information you provided.
Does it mean that VHLS-AMS model is much easier to be produced compared
to IBIS model? Do we need to run the Hspice simulation in order to
generate the VHDL-AMS model like what is being done to generate IBIS
model? What is the accuracy of the model compared to IBIS model?
Thanks a lot and hope to hear from you soon!
-Lee

>From: "Pratt, Gary" <gary_pratt@mentorg.com>
>To: "lee yang" <changly_80@hotmail.com>,<ibis-users@eda.org>
>Subject: RE: [IBIS-Users] VHDL-AMS Model
>Date: Mon, 31 Jan 2005 12:18:49 -0500
>
>Hello Lee,
>
>A simple answer to your question is VHDL-AMS provides a high level of
>flexibility. So for instance, instead of waiting for functionality to
>be added to the IBIS standard and then waiting for SI tool vendors to
>implement the function; VHDL-AMS provides you the ability to implement
>the function immediately. To date, the flexibility of VHDL-AMS has
>provided significant benefit in simplifying modeling of highly
>configurable devices such as PCI Express drivers and difficult to model

>receivers containing internal equalization. I suspect VHDL-AMS could
>also be applied to implementing the functionality required for modeling

>power integrity.
>
>Gary
>
>
>
>-----Original Message-----
>From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
>Behalf Of lee yang
>Sent: Sunday, January 30, 2005 11:35 PM
>To: ibis-users@eda.org
>Subject: [IBIS-Users] VHDL-AMS Model
>
>Hi,
>
>Recently I heard about another behavioral model call VHDL-AMS, can
>anyone please give some background about it?
>Since we already have IBIS model, what is the reason we need to use
>VHDL-AMS model instead? What is the pros and cons compared to IBIS
>model?
>Thanks and appreciate if someone can shed some light.
>
>-Lee Yang
>
>_________________________________________________________________
>Find love online with MSN Personals.
>http://match.msn.com.my/match/mt.cfm?pg=channel
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Received on Tue Feb 1 23:19:29 2005