RE: [IBIS-Users] RE: [IBIS] To capture the delay variation with change in IO voltage

Venu,
 
The IBIS model will only partially for the Vcc variations.
Here is how:
 
If you lower the supply voltage, the origin of the pullup
IV curve will go down to that lower voltage.  So the pullup
will pull up to a lower voltage.
 
However, in real transistor circuits, this lower supply
voltage would also reduce the IV curve size, because the
Vgs voltage is smaller than at the normal supply voltage.
This effect is usually called the "gate modulation effect"
and is not reproduced by IBIS simulators to my knowledge.
We are working on BIRD98 to describe this effect for IBIS
models.
 
http://www.vhdl.org/pub/ibis/birds/bird98.txt
 
There may be two reasons for being interested in supply
voltage variations.
 
1)  Static DC characteristics of the buffer, i.e. how
much will its strength change if we change the supply
voltage.  If you need this, you can generate several IV
curves at different supply voltages and make a [Model]
for each set.  You can then use the [Model Selector]
keyword to allow the tool to select the one you want
to simulate with.
 
2)  Dynamic noise simulations, i.e. you want to find
out how the buffer will "degrade" its switching performance
when there is noise in the supply voltage during its
switching.  This is a more difficult task, and IBIS is
not doing too well on it.  We have BIRD95 and BIRD98 as
Lynne mentioned it already to solve this deficiency in
the IBIS world.  However, as usual, if you write your
own models in the *-AMS languages, you can describe these
behaviors to your heart's content without having to wait
for BIRD95 and BIRD98.
 
I hope this will shed some light on your questions.
 
Arpad
=========================================================
 
 


________________________________

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Lynne D. Green
Sent: Tuesday, February 07, 2006 8:07 AM
To: 'Ummalaneni, Venu Babu (Venu)'; ibis-users@eda.org; ibis@eda.org
Cc: 'Kotikalapudi, Shiva Kumar (Shiva)'
Subject: [IBIS-Users] RE: [IBIS] To capture the delay variation with change in IO voltage 


Hello, Venu,
 
Problems modeling delay changes with supply changes is a known "feature" of IBIS.
 
The IBIS Open Forum is actively working on this.  BIRDs 95.6, 97.2, and 98 are part of the solution.  BIRD 95.6 was recently approved.
 
User input is important in addressing timing issues.  You would be welcome to attend the IBIS Open Forum and IBIS Futures meetings.  For more info on these meetings (agenda, teleconference passcodes) please contact the IBIS chair, Michael Mirmak (michael.mirmak@intel.com).
 
Best regards,
Lynne


________________________________

	From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Ummalaneni, Venu Babu (Venu)
	Sent: Tuesday, February 07, 2006 2:57 AM
	To: ibis-users@eda.org; ibis@eda.org
	Cc: Kotikalapudi, Shiva Kumar (Shiva)
	Subject: [IBIS] To capture the delay variation with change in IO voltage 
	
	

	Hi Gurus,

	I have generated an IBIS model using rated IO voltage(1.5V) and simulated it at the same IO voltage(1.5V); the matching between 

	hspice vs IBIS is very good (1st waveform in attached *.pdf). When I simulated the same IBIS model with reduced IO voltage (1.1v), 

	the matching is poor (2nd waveform) between IBIS and hspice models. IBIS model is not able to capture the delay variation with supply voltage variation.

	Next, I have re-generated the IBIS model with reduced IO voltage(1.1V) and the simulation at this voltage(1.1V) gives good matching 

	(3rd waveform) between IBIS and hspice models.

	Means IBIS model can not be used to see the variation in delay with the ripples on IO voltage? Is it known limitation?

	Are there any techniques/methods exist to build an IBIS model, which can be used to simulate at an IO

	voltage lesser/greater than the voltage at which it is build?

	Here, I am attaching a PDF of the waveforms I observed.

	Could some one help me in clarifying the above queries?

	Thanks in advance.

	Best Regards,

	Venu

	<<ibis_hspice_delay.pdf>> 


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