RE: [IBIS-Users] Is it possible to create an IBIS model of a pad, which based on the transimpedanz principle?

Hello, Gerald,
 
The answer is usually yes  However, the implementation depends on the
connection at the chip.
 
Some things one can model using table-based IBIS:
* an unused pad (no connection to silicon)
* pad to DC (such as ESD/Vcc/gnd pad)
* pad to on-package or on-die termination (one or more components in the
termination)
* an I/O buffer where a more-accurate model of the pcb-to-chip path is
needed
 
There is also the consideration of model data: "lumped" pin parasitics,
S-parameters, RLGC matrix elements, I-V table data, SPICE netlist, etc.  Are
package-to-chip parasitics separate, or already included in the package
model?  These answers can help when comparing possible implementations.
 
Best regards,
Lynne
 
 
"IBIS training when you need it, where you need it."
 
Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com
 
 


  _____  

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of Gerald Krasemann
Sent: Thursday, June 18, 2009 5:35 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] Is it possible to create an IBIS model of a pad, which
based on the transimpedanz principle?


Hello,
 
is it possible to create an IBIS model for a pad, which based on the
transimpedanz principle?
 
 

thanks
 
Gerald Krasemann
 
 
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Gerald Krasemann                                                
 
Development Engineer, Digital Development/ Integration
BL Car Entertainment Solutions
 
NXP Semiconductors Germany GmbH
A Company of the NXP Semiconductors Group
Georg-Heyken-Str. 1, 21147 Hamburg, Germany                
Tel: +49 40 5613 1720  Fax: +49 40 5613 3392
Gerald.Krasemann_ f rom _nxp.com  www.nxp.com <http://www.nxp.com/> 
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