Clarifications on IBIS standard

From: Stephen Peters <speters@ichips.intel.com>
Date: Thu Feb 02 1995 - 13:39:05 PST

Hello Raj:
     I can answer some of your questions, my comments are prefixed by >>

                     Regards,
                     Stephen Peters
                     Intel, Corp.
                     (503) 696-4108

Clarifications on IBIS standard

We are in the process of making IBIS models and there were a few items
in the standard and in the discussions which were not clear to us. I hope
somebody can clear these issues.

1. When is the Golden Parser for version 2.0 likely to be ready ?

2. It is rightly pointed out that the pulldown and pullup
characteristic for tristate outputs may be non-monotonic. The standard
says that this can happen in at most one place. The i-v characteristic
may then locally have a negative resistance. Will this not pose a
problem to simulators ?

>> The IBIS standard specifies that the pullup and pulldown curves
>> contain pullup and pulldown data ONLY, i.e. in the region where
>> the clamp diodes are active the current due to the clamp diodes must
>> be subtracted from the pullup/pulldown current. This is where the
>> non-monotonic curves come from -- at the extremes of the I/V curves
>> where you are subtracting a large diode current from the combined
>> diode/on-state-IV curve. In practice, a simulator sums the two
>> currents together (power clamp and pullup or gnd clamp and pulldown)
>> thereby making the result monotonic.

3. During a transition, it is not clear whether the pullup or pulldown
characteristics should be used by a simulator. This is not a problem
for making the IBIS models, but only for using them in a simulator.

>> Which curve to use and how they transistion is a characteristic
>> of the simulator. In general, the purpose of the IBIS standard
>> is to present consistant data in a consistant format and not to
>> specify how simulators are to use the data.

4. Is there a provision for specifying a pad or die resistance i.e
R_comp in addition to C_comp?

>> No. The effects of a pad or die resistance are
>> accounted for in the I/V curves.

5. The standard does not explicity specify the nature of the input
ramp in obtaining ramp rates. What should be the input rise time as
well as the high and low values of the input pulse?

Perhaps many of these issues have been thrashed out at different
forums. I would be greatly obliged if somebody would educate me on
this.

        Raj Raghuram
        National Semiconductor
        2900 Semiconductor Drive
        Mail Stop D3-677
        Santa Clara, CA-95052
        email: raghu@berlioz.nsc.com
        Phone: (408) 721-6220 (O)
        Phone: (408) 252-1285 (H)
Received on Thu Feb 2 13:44:08 1995

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