Fred and Raj:
As Will Hobbs, Chairman of IBIS Forum responded, the ibis@vhdl.org reflector is
the appropriate place to ask questions. Several questions have resulted in
good discussions and refinements to IBIS.
Here are some of my thoughts on your questions.
(1) The Golden Parser is in the final stages of review, and the final version
is expected shortly (weeks). We cannot commit to an exact date.
(2) Monotonicity has been a big concern with the committee and has generated
a lot of discussion. Some simulators are more sensitive to non-monotonic
data than others. Without getting totally bogged down in this discussion
here, I will just respond that some [Pulldown] tables are non-monotonic
in the negative voltage region. When the data is summed with the [GND Clamp]
table, the TOTAL table is monotonic. Even simulators that are sensitve to
non-monotonic data will usually handle this case. The Golden Parser gives
a non-monotonic data warning. So, if necessary, you can adjust the data.
The overall philosophy in allowing non-monotonic tables is that IBIS presents
raw data extractions without appling any particular data modification
strategy which would corrupt the data.
(3) The transition algorithms regarding the [Pulldown] and [Pullup] tables
will probably be different between simulator companies. Also, some companies
convert the IBIS data into their internal representations, so their existing
transition algorithms are used. Generally, the transition algorithms are
not public. The Waveform table extension in IBIS Version 2.0 captures actual
reponses and can be used to check the accuracy and/or to shape the transitions.
(4) Adjustments to the [GND Clamp] table can be made to create an effective
R_comp if it is parallel to C_comp. If the resistance is in series, it possibly
can be lumped with R_pin or the default R_pkg sub-parameters. We need
to know about the specific concerns to provide more detail.
(5) You are right, IBIS does not provide an Input pulse specification for
deriving Ramp rates (and Waveform Tables). A reasonable guideline is to
mimic actual conditions for which the device would be used. Therefore it is
probably better not to mandate a specific condition. The voltage swing should
be appropriate for the technology, e.g., 0 to 5V for CMOS and about 0 to 3V
for TTL. A signal faster than the expected Ramp rates is my preference,
although a case could be made to provide a response that mimics the
data book input ramps specified for timing tests. Possibly a 50 Ohm series
resistance approximating the pulser source impedance and trace environment
to the device input should be included. However, since the actual thresholds
are narrow (several 100 mV), the Ramp rates and Waveform tables should not
differ significantly for any reasonable, appropriate Input.
Bob Ross,
Interconnectix, Inc.
> Raj,
> Items 3 through 5 are also of interest to me. I too have been wondering if
> ibis@vhdl.org is the proper forum for those of us who are interested in the
> application of IBIS data rather than the creation of IBIS data and standards.
> It seems to me from the regular IBIS participation that there are mostly
> representatives of IC and EDA tools vendors. I am sure that the tool vendors will
> eventually offer means of using IBIS data with their tools. In the meantime, some
> of the tool users (like me) must be struggling along trying to use IBIS data as it
> becomes available (and changes form).
> I recently subscribed to the SI reflector, si-list@silab.Eng.Sun.COM (subscribe to
> si-admin@silab.eng.sun.com), but in the past two weeks, I've seen very little
> discussion, an nothing relating to IBIS use.
> If you want, I could let you know what I've been doing with IBIS data, but maybe I
> should take it off-line.
> I would like to hear opionions regarding the proper forum for IBIS use from all
> you IBISians and SI-listians out there.
> Fred
> fvance@FirePower.com
> FirePower Systems, Inc.
> 190 Independence Dr.
> Menlo Park, CA 94025
> (415) 462-3055
> Begin forwarded message:
> Date: Thu, 2 Feb 95 10:30:08 PST
> From: raghu@berlioz.nsc.com (Raj Raghuram)
> To: ibis@vhdl.org
> Subject: Clarifications on IBIS standard
> Cc: chai@rockie.nsc.com
> Clarifications on IBIS standard
> We are in the process of making IBIS models and there were a few items
> in the standard and in the discussions which were not clear to us. I hope
> somebody can clear these issues.
> 1. When is the Golden Parser for version 2.0 likely to be ready ?
> 2. It is rightly pointed out that the pulldown and pullup
> characteristic for tristate outputs may be non-monotonic. The standard
> says that this can happen in at most one place. The i-v characteristic
> may then locally have a negative resistance. Will this not pose a
> problem to simulators ?
> 3. During a transition, it is not clear whether the pullup or pulldown
> characteristics should be used by a simulator. This is not a problem
> for making the IBIS models, but only for using them in a simulator.
> 4. Is there a provision for specifying a pad or die resistance i.e
> R_comp in addition to C_comp?
> 5. The standard does not explicity specify the nature of the input
> ramp in obtaining ramp rates. What should be the input rise time as
> well as the high and low values of the input pulse?
> Perhaps many of these issues have been thrashed out at different
> forums. I would be greatly obliged if somebody would educate me on
> this.
> Raj Raghuram
> National Semiconductor
> 2900 Semiconductor Drive
> Mail Stop D3-677
> Santa Clara, CA-95052
> email: raghu@berlioz.nsc.com
> Phone: (408) 721-6220 (O)
> Phone: (408) 252-1285 (H)
Received on Thu Feb 2 18:23:09 1995
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