Arpad,
I consider the fact that in order to have SPICE model the correct diode
resistance with a MOS transister that you have to "trick" it by either
attaching a unidirectional resistor to the drain, attaching a resistor
between the bulk and the drain, or negating the
inherent diode all together and using an attached discrete component,
that there is a fault with the SPICE simulator (or rather just an
incomplete model). (Of the above, we are still experimenting as to which
will provide the most accurate to the real device).
No big deal, as through your help and others, we now have ideas for some
possible workarounds,
but the SPICE manual did not provide any discussion on this, and listed
no apparent way of including the correct vertical resistance associated
with the diode (instead it just includes the lateral drain resistance
associated with the current path through the transistor). So, I don't
think that the users of SPICE are to be blamed so quickly on this point,
but more rather the limmitations to modeling the inherent diode
associated with MOS transistors in SPICE (why don't they provide for
a vertical resistance parameter that would be associated with the diode
instead of the drain (or source) resistance?). From our observations
so far, just a adding a few ohms of additional resistance in the form of
a resistor between the bulk and source has a very significant effect to the
IBIS table, specifically in the regions that the diodes start to clamp
(between -Vcc to 0V, and Vcc to 2*Vcc).
-Scott Schlachter
>Scott,
>
>I can't comment on the s2ibis program. I just wanted to correct you in saying
>it is not that SPICE doesn't model the diodes correctly, it is the people using>
>SPICE who do not bother using some of the SPICE parameters to model the diodes
>correctly.
>
>Arpad
Received on Thu Nov 7 14:01:22 1996
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