Rising Waveform Loading Effects

Hello to all,

I am concerned about the validity of using IBIS models for general
printed circuit board signal analysis in an environment of various types
of loads, transmission lines, vias, pads, connectors, various
terminations, etc.

According to the IBIS specification V2.1 dated Dec. 13, 1995, for a
rising waveform (for example), there are various loads specified as
L_dut, R_dut, L_fixture, R_fixture, C_dut, and C_fixture. In addition
data is to be taken with the effects of C_comp included. There is
however no provision for generating curves with a transmission line load
which is more typically the case, especially for high speed circuits. in
actual circuit boards.

It is well known however, that the ramp rate and levels reached will be
affected by the loads. For example, changing the values of R_fixture
and V_fixture on a typical buffer. (The s2ibis2 program will generate
different curves for different values of R_fixture, for example IBIS
curves for 50 ohms and 100 ohms is generated from a command file that
specified curves for 50 and 100 ohms.)

My question is this: If in an actual simulation environment we really
have a different loading condition with transmission lines , vias, etc.,
how can we legitimately use an IBIS model that was generated with a
different lumped element loading condition ?

I hope someone can help me to understand how the IBIS models will
accurately produce the correct physical response with an arbitrary but
realistic loading condition, different from the test fixture, at least
to a level of accuracy close to that which would result from the
original transistor level spice model, say within 5%.

Ed Boeckmann, "My comments reflect solely my own opinion!"
Intergraph Corp.
Huntsville AL 35894
tel. (205)-730-6219
fax (205)-730-6000
email efboeckm@ingr.com
Received on Thu Oct 24 08:37:41 1996