Re: Rising Waveform Loading Effects

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Ed,

Your concern is well taken. However, I would like to point out that an IBIS
model is nothing but data. The V-t curve in the IBIS model is not supposed to
be the same as the simulation waveforms, unless the load is identical to the
load that was used to generate the V-t curve. The simulator can do anything to
this data.

What I mean by this is, that if the simulator is smart enough, it can take the
data and modify it, derive new curves, etc. So, if you have an I-V curve and a
V-t curve which was generated with 50 Ohm resistive load in the model, a good
simulator should derive a new V-t curve that matches the different load
resistance in that particular simulation. Taking this further, the simulator
could make V-t curves with reactive loads also. In general, then, the simulator
can simulate at each iteration with a different set of curves that matches any
loading condition, even if the "load" is another non-linear I-V curve. The
point here is that the data in the IBIS model is not supposed to be a limiting
factor to what the simulator does with it.

Of course this is not the only way things can be done, I was just trying to
illustrate the concept.

The reason resistive (and not reactive or transmission line) loads are preferred
for generating V-t curves is that with a resistive load we get only what the
buffer does. With other types of loads we get what the load does also. Why
would one want to add all that to the V-t curves when it will have to be taken
out anyway to model just the buffer alone?

Arpad Muranyi
Intel Corporation
================================================================================

Hello to all,

I am concerned about the validity of using IBIS models for general
printed circuit board signal analysis in an environment of various types
of loads, transmission lines, vias, pads, connectors, various
terminations, etc.

According to the IBIS specification V2.1 dated Dec. 13, 1995, for a
rising waveform (for example), there are various loads specified as
L_dut, R_dut, L_fixture, R_fixture, C_dut, and C_fixture. In addition
data is to be taken with the effects of C_comp included. There is
however no provision for generating curves with a transmission line load
which is more typically the case, especially for high speed circuits. in
actual circuit boards.

It is well known however, that the ramp rate and levels reached will be
affected by the loads. For example, changing the values of R_fixture
and V_fixture on a typical buffer. (The s2ibis2 program will generate
different curves for different values of R_fixture, for example IBIS
curves for 50 ohms and 100 ohms is generated from a command file that
specified curves for 50 and 100 ohms.)

My question is this: If in an actual simulation environment we really
have a different loading condition with transmission lines , vias, etc.,
how can we legitimately use an IBIS model that was generated with a
different lumped element loading condition ?

I hope someone can help me to understand how the IBIS models will
accurately produce the correct physical response with an arbitrary but
realistic loading condition, different from the test fixture, at least
to a level of accuracy close to that which would result from the
original transistor level spice model, say within 5%.

Ed Boeckmann, "My comments reflect solely my own opinion!"
Intergraph Corp.
Huntsville AL 35894
tel. (205)-730-6219
fax (205)-730-6000
email efboeckm@ingr.com

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Date: Thu, 24 Oct 1996 10:25:42 -0500
Subject: Rising Waveform Loading Effects
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