Hello!
After creating some ibis-modells and simulating with them, I have
now some questions:
1) Does anyone know, what voltage step (u/i-tables) is normally used?
I had the problem that by taking a step of 0.1V some oscillations
occured when simulating a transmission line. By increasing the
step up to 0.5V these oscillations disappeared.
What can be the reason for this?
2) The ibis-specification defines what voltages, temperatures and
process parameters have to be used for simulating worst/best case
conditions only for TTL- and CMOS-technologies?
What should be used for ABT (advanced BICMOS technology) or
BCT (BICMOS technology)?
3) By creating the u/i-tables from actual silicon measurements
the voltage sweep (-VCC ... +2VCC) must be reduced.
To cover the recommended region the specification says to make
an extrapolation.
Has anyone ever made such an extrapolation and compared the
simulation results with an ibis-modell without the extrapolation
(i.e. reduced u/i-tables) ?
I hope I hear from you soon!
Thank you very much!
email: schwa1@fh-landshut.de
mail: Walter Schneider
Muehlweg 25
94513 Schoenberg
Germany
phone: 08554/3916
Received on Thu Oct 2 00:05:29 1997
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