Re: BIRD #61

Fred Balistreri wrote:

> Hello Arpad, I'm curious about how the delay numbers wrt slope are
> measured or derived from. I realize you may not be the right person to
> ask. My question is very fundamental. Are we measuring these parameters
> and if so how. Or are we relying on SPICE simulations? In other words
> we are trying to determine the conditions upon which an input stage
> accepts a "high" or "low" state. On a VVLSI device how does one measure
> this? Do semiconductor vendors really put test points inside the
> input stage to probe? If not what techniques are going to be used to
> assure of the numbers? I'm having a hard time understanding how the
> numbers are derived and if they can be trusted.

I'll answer this. Basically, we SPICE the input variation with
stimulus waveforms. The actual setup and hold times are also
derived from simulation but are regressed by our test group
during characterization. One of the reasons we chose to propose
the table-based method is that it's possible for physical model
services to measure delay variation by testing setup and hold
variations against the input waveform sets.

-- 
D. C. Sessions
dc.sessions@vlsi.com