Re: IBIS BUG41 Arguments

Scott,

Please let me address your comments.

Scott McMorrow wrote:
> 1) If this application of differential inputs is intended to
> "trick" an IBIS simulator into allowing a variable input threshold
> without modifying the IBIS model, then I believe this would be
> a reasonable application. In this case, Vref truly acts like
> a static voltage.

Vref could be used this way. In fact, when taken to the extreme, Vref can also
be used as an inverting logic input that forces all the outputs to a known logic
level.

> 2) If this application is intended to account for noise effects
> on input timing, I would suggest that this will not be very
> accurate at all. For the following reasons:

I disagree. And, in fact IBM made a very compelling showing recently at the
Future DRAM Task Group Meeting in San Jose that a small amount of shift in Vref
(or the crossing voltage) can cause a significant shift in the timing. So it is
VERY important to be able to model these effects.

> a) Vref has a propensity to pick up noise from the power
> and ground planes in the GHz region from minor plane
> resonances that occur. These effects will not be modeled
> in any reasonable time by any known simulator.

Vref might not be a separate plane. Vref could simply be a trace on a signal
plane that is subject to the same effects as any other signal trace (eg. xtalk,
common-mode noise).

> b) Vref inputs on devices are extremely complex and are
> generally not direct connections to the receiver differential
> amplifiers. Among manufacturers of devices there are various
> methods of filtering Vref on the die to exclude external and
> internally generated noise. We mortals will most likely never
> have access to the actual on-chip vref circuits decks. These
> are the "secret sauce" that makes a particular device out perform
> the other competition.

On simple logic devices, Vref DOES simply tie to the other side of the
differential input. See the attached datasheet for an example of a device that
we are trying to provide a model for TODAY!

> c) Vref is subject to displacement currents originating from
> the input transistors of the receiving device. Internal parasitic
> gate capacitance can cause some significant currents.
> (See b) above.)

Doesn't C_comp take care of this?

-- 
Regards,
Stephen M. Nolan