DATE: 6/26/01
SUBJECT: 6/21/01 EIA IBIS Summit Meeting Minutes
VOTING MEMBERS AND 2001 PARTICIPANTS LIST:
3Com (& CommWorks) Roy Leventhal
Ansoft Corporation (Eric Bracken)
Apple Computer John Figueroa
Applied Simulation Technology Raj Raghuram, Norio Matsui, Fred Balistreri
Avanti (Chen Hongyu)
Cadence Design [Ian Dodd], Patrick Dos Santos, Heiko Dudek
Lynne Green*, Lance Wang
Cisco Systems Syed Huq*, Lungfu Chen
EMC Corporation Brian Arsenault, Jinhua Chen
Fairchild Semiconductor Adam Tambone
Huawei Technologies Rachild Chen
IBM Michael Cohen, Greg Edlund, Wes Martin,
Yeon-Chang Hahm, Bill DeVey, Pravin Patel
Innoveda (& HyperLynx) Guy de Burgh*, John Angulo*, Cary Mandel,
Matthew Flora, Steve Kaufer*
Intel Corporation Stephen Peters*, Arpad Muranyi*, Dave Lorang,
Michael Mirmak, Qinglun Chen, Will Hobbs,
Wei-hsing Huang*
LSI Logic Larry Barnes*
Mentor Graphics Bob Ross*, Tom Dagostino*, Chris Reid,
Mike Donnelly, Hazem Hegazy*, Tony Dunbar,
Griff Derryberry, Dan Lake, Sherif Hammad,
Mohammed Korany, Weston Beal*, Chris Swaim,
Ali Samii, Eric Ronger, Karine Loudet,
Daisaku Shiga*, Kenji Kushima*
Micron Technology Randy Wolff, Yong Phan
Mitsubishi Pat Hefferan*
Molex Incorporated Gus Panella, Brian O'Malley
Motorola (Rick Kingen)
National Semiconductor Milt Schwartz
North East Systems Associates Edward Sayre
Philips Semiconductor Zack Ciccone, Rob Mataheroe
Quantic EMC (Mike Ventham)
Signal Integrity Software Douglas Burns, Barry Katz, Walter Katz
SiQual Scott McMorrow, Rob Hinz, Bernard Voss,
Chris Brewster
Texas Instruments Thomas Fisher*, Stephen Nolan, Ramzi Ammar,
Jean Claude Perrin, Moshiul Haque*
Time Domain Analysis Systems Dima Smolyansky, Steve Corey
Tyco Electronics (Russell Moser)
Via Technologies (Weber Chuang)
Zuken (& Incases) John Berrie, Ralf Burning*
OTHER PARTICIPANTS IN 2001:
Actel Corporation Silvia Montoya
Acuson Kim Helliwell
AMCC Jeff Smith
ASIS Ltd David Wright
Brocade Communications Robert Badal
BMW Friedrich Hasinger
Cereva Networks Bob Haller
Compaq [Peter LaFlamme], Ron Bellomio, Quang Dam,
Bill Ham
Cypress (Rajesh Manapat)
EADS Airbus Industry Claude Huet
(Aerospatiale)
EFM Ekkehard Miersch, Horle Raines
EIA Cecilia Fleming*
Ericsson Radio Systems Anders Ekholm*
FCI Sercu Stefaan
Foundary Networks Bertram Chan
Framatom Conectors Danny Morlion
Fraunhofer Institute Mariusz Faferko, Peter Kralicek
Reliability and
Integration
Fujitsu Ltd Tadashi Arai, Takeshi Murakami
Heidelberger Druchmaschinen AG Wolfgang Kleinfeldt
Hyundai Electronics Jongho Kang
Idaho State University Al Davis*
Infineon Technologies Christian Sporrer
Intrinsix Corporation Steven Chin
National Institute of Applied Etienne Sicard
Science (INSA)
Nokia Tapani von Ravner, Mika Castren,
Janne Uusitalo
Nortel Networks Calvin Trowell
Oak Technology Darmin Jin
Plexus Technology Group Joseph Socha
Siemens (& Automotive) AG Bernhard Unger, Helmut Katzier, Katja Koller,
Wolfram Meyer, Eckhard Lenski, Gerald Bannert,
Burkhard Muller, Christian Marot,
Manfred Maurer, Amir Motamedi,
Hans Pichlmaier
Sintecs Hans Klos
STMicroelectronics Peter Hirt, Fabrice Boissieres
Sun Adrian Udenze
Toshiba Corp. Hirokaza Kato*, Yuichi Koga*, Toshio Sudo*
Xilinx Susan Wu
In the list above, attendees at the meeting are indicated by *. Principal
members or other active members who have not attended are in parentheses.
Participants who no longer are in the organization are in square brackets.
Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as
follows:
Date Bridge Number Reservation # Passcode
July 20 (888) 316-5901 none 8744603
All meetings are 8:00 AM to 9:55 AM Pacific Time. We try to have agendas out
7 days before each Open Forum, and meeting minutes out within 7 days after.
When you call into the meeting, ask for the IBIS Open Forum hosted by Will
Hobbs and give the reservation number and passcode.
NOTE: "AR" = Action Required.
-------------------------------- MINUTES -------------------------------------
INTRODUCTIONS
The IBIS Summit Meeting was held in Las Vegas, Nevada the day after the trade
show portion of the Design Automation Conference (DAC 2001) at the Las Vegas
Hilton Hotel. The EIA IBIS Open Forum sponsored the meeting, lunch, and
refreshments through membership funding.
About 25 people representing 13 organizations participated. Bob Ross welcomed
the participants. Everyone introduced him/herself. Semiconductor vendors, EDA
vendors and users of EDA tools and IBIS models were represented. (Also,
thanks to Cecilia Fleming and Guy de Burgh for handling the administrative and
registration details.)
All of the presentations and meeting documentation will be uploaded at
http://www.eda.org/pub/ibis/summits/jun01/
The notes below give only some of the content and discussion.
IBIS REPORT
Bob Ross, Mentor Graphics
Bob Ross introduced the general topics of the meeting. They consisted of
An IBIS Report
Business and Election of Officers
Pre-emphasis Modeling and Driver Schedule
SCSI and Fiber Channel Report
Frequency Response and EMC
IBIS-X and IBIS Macro Language
Other Discussions and Ad Hoc Presentations
Bob then gave a general status report. The EIA IBIS Open Forum continues to
be active since 1993. It has about 30 official members and about 350 to 400
people on the e-mail reflectors. It has built up about a $14,000 reserve
for future payments and projects.
This year, ANSI/EIA-656-A (IBIS Version 3.2) was ratified as IEC 62014-1.
Also Version 3.2.7 of the ibischk3 parser was released. More IBIS Accuracy
report material was uploaded.
The current IBIS projects include working on the Connector Specification,
producing an IBIS Version 4.0 upgrade, and also working on a future version
of IBIS designated IBIS-X and the IBIS Macro Language. In addition the Open
Forum monitors and works with other committees including IMIC, EMC/EMI (ICEM)
JEDEC and now T10 and T11 activities.
Bob briefly outlined some Connector Specification Features and some approved
and pending BIRDs for IBIS Version 4.0. The IBIS-X work will be reviewed
later in the meeting. The Connector Specification and IBIS-X working groups
are meeting regularly and are bringing the documents into syntactical
alignment. The work has been going slowly, but it is continuing.
Bob stated that IBIS continues to be well accepted in industry. IBIS models
are supported by EDA, semiconductor, and modeling vendors and by the
technical press.
Finally, Bob thanked everyone for their contributions to IBIS. In particular,
Bob thanked the officers and several other members including those who have
made some technical contributions last year or who have helped set up the
IBIS Summit meetings. The IBIS Open Forum works because several people are
contributing to a number of tasks.
PRE-EMPHSIS BUFFER MODELING
Hazem Hegazy, Fady Galal, and Roshdy Hegazy, Mentor Graphics
Hazem Hegazy shared some pre-emphasis modeling extraction based on some real
IBIS model development projects. He defined pre-emphasis to mean that for
a period of time additional current is supplied by the buffer at the initial
part of a transition.
One problem is extracting the DC I-V tables. Since a clock is necessary for
correct operation, Hazem extracts the DC data using an AC, slow stair-step
voltage at the output with steps at 0.1 V.
Hazem proposed two modeling techniques. The first uses just the final DC
I-V tables, but uses the [Rising Waveform] and [Falling Waveform] tables to
provide the output transition shapes. This technique provides a reasonable
simulation response, but is valid for only one frequency.
A second modeling technique actually decomposes each transition of the
response into two regions. The High-High region is based on extracting the
stronger, pre-emphasized DC I-V tables and using the [Rising Waveform] Table
to describe the shape. The Medium-High region uses the weaker DC I-V tables
and a different [Rising Waveform] table. These two regions are concatenated
by using the [Driver Schedule] keyword. A similar set of regions: Low-Low and
Medium-Low are used with [Falling Waveform] tables for the falling transition.
Arpad Muranyi, Larry Barnes and others questioned concatenation of the [Driver
Schedule] models since many times the weaker driver just adds to an exiting
transition. Hazem stated that it gave good results and provided an easier
method to match waveform shapes. Al Davis commented that there would be
problems with over-clocked situations because of the confusion of documenting
delays within waveforms (versus) ramps. Bob Ross commented that actual
waveform shapes need to be preserved for [Driver Schedule] tables and that
IBIS would not handle the over-clocked situation.
Hazem showed excellent correlation with the original Spice model. He showed
improvement using the waveform tables instead of the [Ramp] keyword by itself
to capture some overshoot shapes. This technique works for a range of clock
frequencies (if the [Driver Schedule] times are adjusted).
SCSI, FIBER CHANNEL IBIS MODELING OVERVIEW
Larry Barnes, LSI Logic
Larry Barnes presented an update on the T10 and T11 Committee modeling.
First he outlined the SCSI and Fibre Channel Specifications and the purpose
of SCSI and Fibre Channel Signal Modeling. On SCSI Signal Modeling Larry
mentioned that the technical report is in final review, and will be forwarded
to T10 for letter ballot in July 2001. The Fibre Channel Signal Modeling
group is expected to complete its document by September 2001 and general
release is expected in January 2002. These groups have select IBIS as the
data exchange format for Semiconductor device models, Terminator models (SCSI
only) and Connector models (SCSI only). Larry went on to say that IBIS 3.2
can be used for present SCSI devices, but cannot completely model "Fallback".
There are also concerns that IBIS may not be accurate enough to model
1GHz / 750ps risetime signals. Also "emphasis" is not completely modeled.
Larry outlined the SCSI and Fibre Channel future with particular attention
to needs in IBIS.
DRIVER SCHEDULE MODELING
Chris Reid and Bob Ross, Mentor Graphics
Bob Ross presented some work done by Chris Reid on investigating using the
[Driver Schedule] keyword to approximate the second bit reduction effect.
Larry Barnes had presented the need for modeling such an effect at the IBIS
Summit meeting in January 29, 2001.
Bob first presented some [Driver Schedule] syntax samples showing enhancement
and reduction operation. The Syntax also showed an illegal case that might be
promising when the actual clock frequency was out of synchronization from the
delays in the [Driver Schedule] keyword. It was not acceptable because the
initial DC level was ambiguous.
Bob presented a simple test circuit that demonstrated the SCSI circuit
operation. The operation involved switching a strong and weaker totem-pole
CMOS stage into a terminated load biased at mid-voltage. In actual practice,
the drivers are differential and the termination is a differential resistor.
The sample circuit a set of output levels from 1 V to 4 V in 1 V steps and
was implemented using the [Driver Schedule] keyword.
Several people commented that the [Driver Schedule] documentation needs more
examples and details on how it operates. IBIS Version 3.2 is not clear.
Two cases for reduced strength operation were demonstrated. The first case
used standard [Driver Schedule] syntax. The second case used the illegal
syntax. However, it did not give the correct pulse widths. So, there is
no need to extend the [Driver Schedule] keyword to accept the illegal syntax.
What this means is that even with illegal syntax [Driver Schedule] can still
only handle a single clock (bit period) frequency.
Bob then showed an extended example which produced output levels from 1 V to
8 V in 1 V steps. Bob illustrated using the [Driver Schedule] syntax to
produce a stair-step waveform over several cycles with 1 V, 1 nS steps. This
application required configuring the driver switching using some Open_drain
and Open_source stages because multiple transitions occurred within a the
overall rising and overall falling portion of the cycle. The high-Z state of
the Open_* drivers effectively disabled that driver and allowed another one
to be turned on or off at a later time.
Bob concluded that all of the examples worked correctly only for a given clock
frequency that was in synchronization with the [Driver Schedule] keyword.
This is a current limitation of the existing IBIS syntax and how it is used.
We moved the election of officers as the next agenda item.
ELECTION OF OFFICERS AND OTHER BUSINESS
Bob Ross thanked the existing officers and gave each of them thank you plaques.
Stephen Peters gave Bob a thank you plaque for his service as Chair.
Bob Ross asked for nominations from the floor for the six officer positions
starting with Chair. All of the existing officers had agreed to serve again
and had been nominated previously. In the case of contested positions, only
member companies can vote, one vote per company. Previously submitted proxy
votes will be counted.
Bob then nominated Stephen Peters to succeed him as Chair. With no other
candidates, Stephen was elected by a show of hands. Stephen nominated Bob
for Vice-Chair, and Bob was elected by a show of hands. The remaining
officers were nominated by Bob and re-elected by a show of hands since all
positions were uncontested.
The following people will serve as officers of the EIA IBIS Open Forum for the
2001-2002 year.
Chair: Stephen Peters, Intel Corporation
Vice-Chair: Bob Ross, Mentor Graphics
Secretary: Guy de Burgh, Innoveda
Web Master: Syed Huq, Cisco Systems
Postmaster: John Angulo, Innoveda
Librarian: Roy Leventhal, 3Com
The following presentation was made before lunch.
MAKING BEHAVIORAL MODELS FOR FREQUENCY DOMAIN ANALYSIS (Moved from before
the election of officers) Arpad Muranyi, Intel
Arpad Muranyi explained why frequency effects are easier to analyze in
the frequency domain. He presented a resonant circuit as an example showing
how the shape of the waveforms are affected by the resonance effects.
Controlling these effects means a buffer model that is accurate at all
frequencies. Arpad then went on to talk about the frequency response of an
IBIS model and its problems. He proposed a new model and went into the
mathematical detail on the real and imaginary parts of it. A Laplace transform
of the resonant circuit was created and simulated showing exact match with
the behavioral model. Arpad described the current issues and work in progress
and in his conclusion he mentioned that only one additional element for
IBIS-X is needed, that complex number and Laplace transform capability is
needed, and the concept can be extended to multi-port circuits.
IBIS-X and IBIS MACRO LANGUAGE PROGRESS
Stephen Peters, Intel
Stephen Peters started by introducing the members of IBIS futures committee
and summarizing the progress since the last summit. The IBIS-X document
(Rev 0.6) has been posted for review and work is well underway in documenting
the IBIS-ML macro language. One more document -- a library guide -- is
planned but has not been started. Due to the emphasis on getting the macro
language documented, work has not begun on defining the nodal-based package
model syntax.
The IBIS futures committee has also been reviewing the connector specification
with an eye towards aligning the syntax, common keywords, and document format
with the IBIS-X spec. Progress has been made, but it has become a bigger job
than anticipated. Several people expressed the desire to turn the Connector
Specification into the nodal-based package model description. Stephen pointed
out that there are significant differences between describing a regular
structure such as a connector and an irregular PCB or package. No definitive
conclusion was reached, however Stephen stated that the futures committee would
strongly consider the possibility. Stephen also noted that no work has been
done on an API and he is awaiting someone to champion this idea. Stephen then
concluded this part of his presentation by noting the immediate goal of the
futures committee is to finish the macro language documentation, followed by
defining the nodal-based package syntax and driving the connector spec to
completion.
The discussion then turned to a review of the IBIS-X document itself. Stephen
started by presenting the philosophy behind IBIS-X (separation of data from
algorithm) then showed how it is backwards compatible with current IBIS and
a possible transition path between the two. He then described the two step
process for creating a new buffer model in IBIS-X. In brief, the [Define]
keyword allows the user to create a behavioral description of a buffer using
IBIS-ML (the macro language). The data for the model is still provided using
an IBIS-X data template, just as in traditional IBIS. Stephen also introduced
the concept of object 'classes' and 'types' and object 'customization'.
Stephen then gave a brief overview of the sections of the document itself,
pointing out new keywords and changes. The General Syntax Rules and Guidelines
has adopted the connector spec "120 character line" limit and ambiguous/unclear
rules have been clarified. Major sections of the file now have [Begin][End]
blocking and keywords for text and library 'Include' functions have been added.
While the [Component] section remains basically unchanged, the [Model] section
has been replaced with a section describing how to define new models (as shown
above). A placeholder for the forthcoming package model has been included,
and the existing EBD specification has been incorporated. A brief discussion
was held on the possibility of turning the EBD spec into a nodal based syntax,
thus creating our package description.
IBIS-X AND IBIS-ML
Stephen Peters, Intel
Finally, Stephen presented a selection of slides from another presentation
given previously that showed some of the syntax of the IBIS Macro Language.
Basic R/L/C elements, dependent and independent sources, and the syntax
for including then in a netlist were presented. Arpad Muranyi requested
that a 'Laplace' type element be added, as well as support for complex
numbers. After discussion Stephen agreed that the need was there and
they would be added. Stephen also covered some of the programming
constructs available in the language, emphasizing the difference between
the run time checks of alarm and the compile time static logic checks of
the if-then-else and select-case constructs. A 'foreach' operator was
also presented. Stephen then turned the podium over to Al Davis.
APPLYING THE IBIS MACRO LANGUAGE TO NEW KEYWORDS
Al Davis, Idaho State University
Al Davis described some applications using the Macro Language. He showed
how to define a component as a macro explaining Pin Mapping, Series Pin
Mapping and Diff Pin. Al then explained how a standard macro could
be 'inherit'ed and 'extend'ed. He gave, as an example, a true differential
buffer. Also Test data and Test loads explaining the concept of 'trigger's
was presented.
EMC PARAMETERS FOR IBIS
Guy de Burgh, Innoveda
Guy de Burgh presented a number of parameters that could be used for EMI
analysis. These include the Power Dissipation Capacitance (Cpd) which is
readily available in databooks, and can also be used for thermal analysis.
Also presented were parameters for heatsinks and connectors. Examples
of how these parameters would fit into the IBIS specification were shown.
In conclusion a more detailed specification is being prepared that will
include how to measure these parameters. This will then be submitted as
a Bird.
BUS SWITCH MODELING ISSUE (Ad Hoc presentation)
Tom Dagostino, Mentor Graphics
Tom Dagostino commented on some unanticipated bus switch behaviors he observed
on actual parts. The conventional Series MOSFET model describes an NMOS
device. The [On] tables assume that the gate is held high, and the Vgs tables
describe low current levels at low Vgs voltages for constant Vds values. Some
devices are constructed using PMOS devices. The [On] state gate is held low,
and the actual Vgs table starts with a high current that decreases with
increasing Vgs values. Furthermore, an NMOS and PMOS FET can be put in parallel
and switched by a driver. This typically produces a non-monotonic table with
high currents at low and high Vgs voltages, and lower currents in the middle.
The last two variations were not anticipated by the [Series MOSFET] keyword.
For the second case, ibischk3 reports the wrong polarity. For the third case,
ibischk3 reports an monotonicity error. In both cases, the EDA tool algorithms
probably do not work.
Some discussion occurred regarding some of the MOSFET model table details. Tom
asked if this was a serious enough problem to create a new BIRD to handle the
new cases. There seemed to be general agreement to consider both a BIRD and
a possible fix to ibischk3, if needed to deal with these technologies. It
may require implementation in IBIS-X, but at least the issue needs to be
documented.
OVERCLOCKED PROBLEMS (Ad Hoc presentation)
Arpad Muranyi, Intel
Arpad Muranyi described the overclocked problem. IBIS waveforms preserve
initial delay. When the clock frequency is increased (pulse width is reduced),
the transition of a falling edge to the rising edge may occur before the
falling edge has completed, and the algorithm jumps into the same truncated
value in the rising edge. This process causes the initial delay be eliminated.
This may cause false Tco values for the second pulse.
Arpad showed some illustrations on the white board showing a succession of
such transitions for a real device based on Spice simulations. Arpad proposed
a process that retains the initial delay. It may apply only to a CMOS buffers
with some internal capacitance pre-shoot. The peak of the preshoot defines
when the actual output buffers start the transition.
Stephen Peters asked why we should be concerned with this. The period is
too small. Bob Ross responded that customers were operating buffers at
actual clock frequencies. Larry Barnes indicated that this was important for
double edged clocking. Bob indicated that this could also be an artifact of
two-waveform based edges where one of the edges is usually much slower than
the other.
Al Davis asked if the IBIS Specification should state what the EDA tool is
to do in this case. Bob stated that the tool should produce results that
match the data best. However, it is not known what algorithm is best (or even
if there is a good solution). However, a specific solution could be
implemented in IBIS-X.
CLOSING THE MEETING
Because of vacation schedules, the next teleconference meeting is scheduled
on July 20, 2001.
Bob Ross thanked the participants and presenters for their contributions and
Cecilia Fleming and Guy de Burgh for helping in the meeting arrangements.
Stephen Peters thanked Bob for his service as Chair. Stephen then discussed
some working group meeting plans and mentioned that the next IBIS Summit
Meeting is scheduled in Massachusetts in September 2001. With no further
discussion, Stephen closed the meeting.
NEXT MEETING:
The next teleconference meeting will be on Friday, July 20, 2001, from 8:00 AM
to 10:00 AM.
==============================================================================
NOTES
IBIS CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-1831
stephen.peters@intel.com
Senior Hardware Engineer, Intel Corporation
M/S JF4-215
2111 NE 25th Ave.
Hillsboro, OR 97124-5961
VICE CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897
bob_ross@mentor.com
Modeling Engineer, Mentor Graphics
8005 S.W. Boeckman Road, Wilsonville, OR 97070
SECRETARY: Guy de Burgh (805) 988-8250, Fax: (805) 988-8259
gdeburgh@innoveda.com
Senior Manager, Innoveda
1369 Del Norte Rd.
Camarillo, CA 93010-8437
LIBRARIAN: Roy Leventhal (837) 797-2152, Fax: (847) 222-2799
roy_leventhal@3com.com
Senior Engineer, CommWorks Corp. (a wholly owned 3Com subsidiary)
1800 W. Central Rd.
Mt. Prospect, IL 60056-2293
WEBMASTER: Syed Huq (408) 525-3399, Fax: (408) 526-5504
shuq@cisco.com
Manager, Hardware Engineering, Cisco Systems
170 West Tasman Drive
San Jose, CA 95134-1706
POSTMASTER: John Angulo (425) 869-2320, Fax: (425) 881-1008
jangulo@innoveda.com
Development Engineer, Innoveda
14715 N.E. 95th Street, Suite 200
Redmond, WA 98052
This meeting was conducted in accordance with the EIA Legal Guides and EIA
Manual of Organization and Procedure.
The following e-mail addresses are used:
ibis-request@eda.org
To join, change, or drop from either the IBIS Open Forum Reflector
(ibis@eda.org), the IBIS Users' Group Reflector (ibis-users@eda.org)
or both. State your request.
ibis-info@eda.org
To obtain general information about IBIS, to ask specific questions
for individual response, and to inquire about joining the EIA-IBIS
Open Forum as a full Member.
ibis@eda.org
To send a message to the general IBIS Open Forum Reflector. This
is used mostly for IBIS Standardization business and future IBIS
technical enhancements. Job posting information is not permitted.
ibis-users@eda.org
To send a message to the IBIS Users' Group Reflector. This is
used mostly for IBIS clarification, current modeling issues, and
general user concerns. Job posting information is not permitted.
ibischk-bug@eda.org
To report ibischk2/3 parser bugs. The Bug Report Form Resides on
eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs.
To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms
which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt,
/pub/ibis/bugs/s2ibis2/bugs2i2.txt, & /pub/ibis/bugs/s2iplt/bugsplt.txt
respectively.
Information on IBIS technical contents, IBIS participants, and actual
IBIS models are available on the IBIS Home page found by selecting the
Electronic Information Group under:
http://www.eigroup.org/ibis/ibis.htm
Check the pub/ibis directory on eda.org for more information on previous
discussions and results. You can get on via FTP anonymous.
==============================================================================
Received on Tue Jun 26 08:33:22 2001
This archive was generated by hypermail 2.1.8 : Fri Jun 03 2011 - 09:52:30 PDT