RE: [IBIS] R-Load

From: Muranyi, Arpad <arpad.muranyi_at_.....>
Date: Thu Dec 22 2005 - 10:29:05 PST
Vinayak,

In addition to the answer you already got to the first
part of your message here is something to answer the
second part.

This may not how every tool vendor does it, but you can
look at p. 37 in the IBIS_class_2003_11_03.pdf file in:

http://www.eda.org/pub/ibis/training/IBIS_class_2003.zip

or p. 4-9 in:

http://www.eda.org/pub/ibis/summits/jun03b/muranyi1.pdf

to get a better understanding on how IV and Vt curves
work together.

Arpad
==========================================================

-----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Vinayak Ghatawade
Sent: Thursday, December 22, 2005 6:03 AM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS] R-Load 

Hi,

I had this query as to why we need to model the buffers with R-load
as in most of the cases it is c-load w/without TL line is
driven by the buffer).

does it reflect on the TL impedence that it drives? (50ohm environment)

Also are there any reading material available in the web as to how the 
I/V and ramp/VT
data get used by the boardlevel simulator. If we have I/V and V/T 
mismatches due
to buffer transient behaviour how does the tool interpret this information.

Thanks
vinayak
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Received on Thu Dec 22 10:29:10 2005

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