Re: [IBIS] Miller Capacitance

From: Lynne D. Green <lgreen22@mindspring.com>
Date: Fri Jul 06 2012 - 10:21:03 PDT

Hello, Amit,

As I remember, Arpad Muranyi has done at least one
Summit presentation on this. Topics generally
include input effects on output waveforms, input
edge-rate sensitivity.

The way I have handled this: capture
transistor-level circuit containing 2-3 preceding
stages on chip plus the selected I/O buffer. Use
this in simulations for generating the IBIS
waveform tables.

Hope this helps.

Lynne

"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com

On 7/6/2012 2:18 AM, Amit KUMAR STE wrote:
> Hello Experts,
>
> Is there any way of taking miller capacitance into picture while doing ibis model of a simple single ended buffer?
> Please suggest me any presentation/document which I can refer for the same.
>
> Regards
> Amit
>

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Received on Fri Jul 6 10:21:31 2012

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