RE: [IBIS-Users] DDR4 simulations using IBIS models

Hi Ray,

Having dealt with this issue myself before (not with DDR4 but other interfaces) here are my thoughts:

· Give both .pkg RLC and S-Parameter models to users. Sometimes it's easier to run larger solution space simulations with less accurate RLC package models and then use more accurate S-Parameter models for specific corner cases. I do this a lot with DDR connectors in early simulations.

· Strongly suggest leaving in .pkg RLC as default if just for EDA tool checking/processing/library management etc.

· I'm not a big fan of the w-element external package model formats as they are difficult to import into other tools depending on how its done.

· Pre-layout will be easy to add S-Parameter models but post-layout will be more difficult for users.

· You may even want to consider using some type of broadband spice equivalent package model rather than S-Parameter to see if they simulate faster. These often have generic connector SPICE style syntax and can be easier to use in post-layout situations.

· You've probably already done the work but you want to qualify the impact of .pkg RLC versus S-Parameter in DDRx system environment. You may find the impact is not as significant as you think especially for specific usage cases.

· The .pkg format in IBIS allows for sparse matrices/etc so there may be some field solver/conversion tricks to put more accurate data in the matrix. I think some past Micron presentations at IBIS Summit meetings have shown some work on DDR3 1667 with IBIS .pkg exploration.

Hope this helps.

Best,

Tim

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Gregory R Edlund
Sent: Tuesday, May 10, 2011 1:38 PM
To: Ray Anderson
Cc: ibis-users; owner-ibis-users@eda.org; Ray Anderson
Subject: Re: [IBIS-Users] DDR4 simulations using IBIS models

Ray,

I haven't simulated DDR4 myself, but I have similar experience. I would use a w-element with a lumped C to represent the package via, pad, and solder ball. Try 25 um line width, 60 um edge-to-edge spacing, Er = 3.3, and tand = 0.02. That should get you in the ball park.

I've been using s-parameter models for circuit board vias for some years now.

Greg Edlund
Senior Engineer
Signal Integrity and System Timing
IBM Systems & Technology Group
3605 Hwy. 52 N Bldg 050-3
Rochester, MN 55901

Inactive hide details for Ray Anderson ---05/10/2011 12:18:57 PM--- For relatively low bandwidth signals (say < 1GHz) IBIS .pkRay Anderson ---05/10/2011 12:18:57 PM--- For relatively low bandwidth signals (say < 1GHz) IBIS .pkg style RLC

From: Ray Anderson <ray.anderson@xilinx.com>
To: ibis-users <ibis-users@eda.org>
Cc: Ray Anderson <raya@xilinx.com>
Date: 05/10/2011 12:18 PM
Subject: [IBIS-Users] DDR4 simulations using IBIS models
Sent by: owner-ibis-users@eda.org

  _____

For relatively low bandwidth signals (say < 1GHz) IBIS .pkg style RLC package models are an adequate solution. As we move into the realm of DDR4 where the bitrate is say 4 GB/s and the risetime is on the order of 70psec I am wondering what sort of package models IBIS users tend to use these days.
A 70psec ristime equates to a knee frequency of about 5.7 GHz. For good signal fidelity the package model should be accurate up to at least 3 times that frequency (and preferably 5 times).

Looking at the options available it is looking like s-parameter models may be the only variety that is up to the task. The problem with those from a user’s perspective is that the simulation speed is quite slow compared to RLC based models. From the model makers perspective, it is impractical to do a “full package” s-parameter extraction to provide separate models for each net in large packages. It also appears that in IBIS 5.0 there is no good method to automatically include the proper s-parameter model (as one can do in current tools by just selecting the proper pin name or netname to pull in the correct RLC parasitic).

If IBIS BIRD 125 is adopted allowing IBIS-ISS available for package modeling it seems that will provide a mechanism for the inclusion of s-parameter package models.

Until the enhancements described in BIRD125 become reality what is current solution most users are adopting?

Ray Anderson
Xilinx Inc.

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