Agenda, EPEPS 2017 IBIS Summit Meeting
October 18, 2017 13:00-17:30
DoubleTree by Hilton Hotel
2050 Gateway Place
San Jose, California
| SPONSORS: | Keysight Technologies Synopsys |
| (Minutes | Zip download of all files) | |
| 13:00 | REFRESHMENTS & SIGN IN |
| 13:10 | OFFICIAL OPENING
|
| 13:15 | Go Big or Go Home: The First Transatlantic Telegraph Cable and the Birth of Electrical Engineering (abstract and biography)
Thomas Lee, Stanford University |
| 14:00 | IBIS Update
Mike LaBonte, SiSoft [Presented by Bob Ross, Teraspeed Labs] |
| 14:30 | IBIS-AMI Modeling Using Scripts and Spice Models
Wei-hsing Huang, SPISim (demo files) |
| 15:00 | Equalizations for Multi-level Signal
Nana Dikhaminjia, Ilia State University |
| 15:30 | BREAK, REFRESHMENTS (15 Minutes) |
| 15:45 | Interconnect Modeling Using IBIS-ISS and Touchstone
Michael Mirmak (Intel Corporation) [Presented by Bob Ross, Teraspeed Labs] |
| 16:20 | Interconnect Modeling: New Features for Rail Connections
Bob Ross, Teraspeed Labs |
| 16:50 | OPEN DISCUSSION and CLOSING REMARKS |
| 16:50 | CLOSING REMARKS
Bob Ross, Teraspeed Labs |
| 17:30 | END OF MEETING
Next Open Forum Meeting: October 27, 2017 |