Subject: [IBIS-Users] IBIS Specification Question
From: Shee Kian Wong (SKWONG@altera.com)
Date: Wed Jul 24 2002 - 00:47:22 PDT
Hi all,
I'm currently studying the IBIS Specification. I have some ambiguities about
the I/O Buffer Modeling Cookbook prepared by IBIS Forum.
A typical simulation setup for an output or I/O buffer is given in Page 8 of
the Cookbook, as shown below:
I understand that for an I/O (3-stateable) buffer four sets of I/V curves
are required; one with the pulldown transistor turned on (output in the low
state) (pulldown curve), one with the pullup transistor turned on (output in
the high state) (pullup curve), and two with the output in a high impedance
state (power clamp and ground clamp curves).
For example, when we want to enable the pullup transistor, we would supply
ENABLE pin with vcc (logic 1) and INPUT pin with 0 (logic 0). However, when
the voltage source sweeps in the range of -vcc to 0, the NMOS will be turned
on as well. This is due to the fact that Vpad is smaller than Vgnd, then the
drain of the NMOS would be at the ground side. Since Vgs>0 (G=Logic 0,
S<logic 0), the NMOS is turned on.
Therefore, some ground clamp currents flow through the pulldown transistor.
Why the equation Vpullup(table) = Vpullup - Vpower_clamp does not take care
of the ground clamp current? Also, some current will flow through the pullup
transistor during this voltage sweep range, do we call it pullup current or
ground clamp current?
When the voltage source sweeps from vcc to 2*vcc, again, some current flow
through the pullup transistor. Do we call this current pullup current or
power clamp current?
The same thing occurs to pulldown I/V case.
There are no ambiguities for power clamp and ground clamp curves.
Please kind advice and correct me if I'm wrong.
Much appreciated,
Shee Kian Wong
Applications Engineer
Altera Corporation (M) S/B
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