Subject: Re: [IBIS-Users] IBIS problem
From: Peter LaFlamme (plaflamm@amcc.com)
Date: Mon Sep 16 2002 - 05:46:53 PDT
Hi Akhilesh,
Based on the error you got I think that there are two possibilities that come up. First, because the endpoint that is causing the error is the starting point for the rising waveform. You may want to look at the plot of this waveform. It is possible that
the spice simulation has a strange starting point or you get a slight ringing on the output before the buffer switches. Secondly, it is possible that the load in your simulation is different than is specified. I think that this is probably not the case,
but you may want to look at the ".sp" file to see the actual loading.
If this is the only error, or warning that you got on the VT curves then I think that you will find that it is probably one of the above two possibilities.
Good Luck,
Peter
P.s. If you want to send me the .ibs file I can take a quick look and see if I can see the discrepancy.
akhilesh.chandra@st.com wrote:
>
> Hello,
> I got one problem in my during ibischk
>
> ERROR - Model BD2TARDQP_TC_40: The [Rising Waveform]
> with [R_fixture]=50 Ohms and [V_fixture]=3.3V
> has TYP column DC endpoints of 2.44V and 3.30v, but
> an equivalent load applied to the model's I-V tables yields
> different voltages ( 2.30V and 3.30V)
>
> My cell's Rising Waveform have 2.44V & 3.30V dc end ponit but I am
> unable to find out how IBISCHK got 2.30V & 3.30V DC end point.
>
> Can anyone tell me please how IBISCHK got DC endpoint.
>
> Regards
> Akhilesh
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-- Peter LaFlammeApplied Micro Circuits Corp. System Applications Engineer 200 Minuteman Rd, 3rd Floor Andover, MA 01810
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