[IBIS-Users] RE: Verilog_AMS models


Subject: [IBIS-Users] RE: Verilog_AMS models
From: Angulo, John (john_angulo@mentorg.com)
Date: Fri Jan 16 2004 - 15:37:01 PST


The following is posted on behalf of Michael Mirmak at Intel Corp. Please send any private replies to michael.mirmak@intel.com

-------------------------------------------------

Fabrizio,

There are a variety of sources for VHDL-AMS and
Verilog-AMS information available:

- The IEEE 1076.1 Working Group (VHDL-AMS is an IEEE specification):
http://www.eda.org/vhdl-ams/

- The Accellera Verilog Analog Mixed-Signal Group:
http://www.eda.org/verilog-ams/

- Book: "The System Designer's Guide to VHDL-AMS" published by Morgan
Kaufmann (http://www.mkp.com/). Note that Mentor Graphics is a
contributor

- Most vendors of tools supporting *-AMS, including Cadence, Mentor
Graphics and Synopsys, offer training classes on one or both languages,

- There are several presentations on VHDL/Verilog-AMS applications in
our most recent summit archives:
http://www.eda.org/pub/ibis/summits/jun03a and .../jun03b

I hope this helps!

- Michael Mirmak
  Intel Corp.
  Chair, EIA/IBIS Open Forum
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