[IBIS-Users] parasitic ESD simulation

Hi all again:

       I have a question about Power Clamp and Ground Clamp curves. Some IC
designers use the buffer’s output transistors like ESD protection devices.
They use the transistor’s PARASITIC DEVICES to protect the circuit, i.e. the
clamps are not explicit. Since this protection is based essentially on
layout techniques (areas, corners, etc) and the transistor model (BSIM) does
not model the parasitic devices (maybe I am wrong about it ??) How can I
simulate correctly the clamp behavior ?. I have simulated from a simple
netlist this situation and I get curves that behave like diodes!!! But this
curves what represents? It is the true behavior of clamps?
        How do you face this situation?

Best Regards,

Ramiro. R. Lecona
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Received on Thu Oct 28 09:35:26 2004