It is unlikely that the silicon of your chip is actually capable of sourcing that much current. 26 amps is a lot. 3 tera-amps is impossible. More likely, you created this IBIS model from SPICE, and your SPICE models are the problem. Your SPICE models give unrealistically large currents, probably in the clamp diodes. It is not that uncommon to find SPICE models where the diodes do not include any series resistance. I'll bet that's what's wrong with your SPICE model. All diodes have some resistance. Don't fix your problem by blindly adding package resistance. Find out where the model is wrong (clamp diodes, transistor models, a scale factor mistake, package resistance, etc.), and then go about fixing it. Fix what's wrong; but don't stick on a "band-aid" that happens to make the warnings go away. If you have a package resistance you thought was OK, don't change it unless you can prove the resistance was wrong. Regards, Andy |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis <optional e-mail address, if different> | subscribe ibis-users <optional e-mail address, if different> | unsubscribe ibis <optional e-mail address, if different> | unsubscribe ibis-users <optional e-mail address, if different> | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993Received on Wed Jun 1 06:56:02 2005
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