[IBIS-Users] Asian IBIS Summit (China) - Sixth Announcement

From: Bob Ross <bob_at_.....>
Date: Mon Oct 09 2006 - 07:07:35 PDT
To All:

The IBIS Open Forum is holding an Asian IBIS Summit Meeting in
Shanghai, China, a major technology center on Friday, October 27.
This is the sixth announcement for participation only.  The program
is shown below with speakers from China, Japan and the USA.

Several companies listed below are co-sponsoring this large event
to be held at the luxurious Radisson Hotel Shanghai New World.  Like
last year, we are planning for about 150 - 200 attendees including
several IBIS experts from the USA.

Note, we are also planning a Summit in Tokyo, Japan on October 31,
announced separately.  You may want to consider this in your travel
plans.

Bob Ross
Teraspeed Consulting Group

Lance Wang
Cadence Design Systems


-----------------------------------------------------------------------
                           ASIAN IBIS SUMMIT (CHINA)
                         SIXTH CALL FOR PARTICIPATION ONLY
-----------------------------------------------------------------------

http://www.eda-stds.org/pub/ibis/summits/oct06a/announcement_chinese.pdf

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

                A S I A N   I B I S   S U M M I T   ( C H I N A )

Time/Date:  Friday October 27, 2006, 8:00 AM to 5:30 PM
              Meeting starts at 9:00 AM

Location:   Radisson Hotel Shanghai New World
              88 Nanjing Road (W)
              Shanghai 200003
              CHINA

              Tel: + 86-21-63599999
              Fax: + 86-21-63589705
              E-mail  newworld@radisson-nw.com

              http://www.radisson.com/shanghaicn_newworld

Content:    Presentations and Discussions

Purpose:    Solicit and exchange IBIS and interconnect model related
              information and ideas.

Primary Sponsor:
              Huawei Technologies

Co-sponsors (in alphabetical order):
              Ansoft Corporation, Cadence Design Systems,
              Intel Corporation, Mentor Graphics Corporation,
              Signal Integrity Software (SiSoft), Sigrity,
              and Synopsys.

Cost:       FREE, including refreshments and buffet lunch

Vendors:    Some vendors will have information tables outside
              the meeting room

BACKGROUND

     Last December we held a successful meeting in Shenzhen.  This year
     we are moving to Shanghai another special economic zone in the
     Peoples Republic of China with many high technology companies
     and many development and sales offices of foreign companies.
     Many sites of interest are near the conference hotel.

     Our objective is to reach out internationally to communicate with
     the local experts and to learn of regional concerns.

CONFERENCE LANGUAGE

     The conference language is English, but we will plan for technical
     translations in English and Chinese.  So presenters can optionally
     deliver in Chinese as long as an English version of the material is
     available.

IBIS SUMMIT

     This meeting will be conducted as a formal IBIS Summit Meeting.
     Presentations will be archived in an electronic format on our
     Summits site, and minutes of the meeting will be issued.  However,
     no formal decisions requiring votes will be planned.

CALL FOR PARTICIPANTS

     People involved in IBIS and interconnect model development, EDA
     tool development, and digital circuit design are invited to
     participate to the Summit meeting.  If you plan to participate,
     please register using the information below:

       Name:
       E-mail address:

       Company:
       Top-level Web Link:

       Country:
       Telephone:

       Comments:
         (Such as assistance for the travel requirements at the end)

     Send to BOTH:

       Bob Ross, Teraspeed Consulting Group   bob@teraspeed.com
       Lance Wang, Cadence Design Systems     lwang@cadence.com

     SIGNUP DEADLINE: October 20, 2006

CALL FOR PRESENTATIONS - CLOSED, OUR PROGRAM IS FULL

AGENDA

     Currently we are planning presentations from the following companies:

     CHINA
       Fiberhome Telecomminications Technology, Huawei Technologies, and
       ZTE Corporation

     JAPAN
       Cybernet Systems, Japan Aviation Electronics, JEITA, and NEC
       Electronics

     USA
       Ansoft, Cadence Design Systems, Intel Corporation, Mentor Graphics
       Corporation, Signal Integrity Software (SiSoft), Sigrity, and
       Teraspeed Consulting Group

-----------------------------------------------------------------

          I B I S  S U M M I T  M E E T I N G  A G E N D A

8:15    REFRESHMENTS & SIGN IN
          - Vendor Tables Open

9:00    Introductions and Program Overview
          - Welcome, Jiang, XiangZhong, (Huawei Technologies, China)
          - Welcome to Summit, Mirmak, Michael (Intel Corporation, USA)
          - Welcoming Comments, Invited Chinese Leader/Speaker (China)

9:30    The Direction of IBIS as a Standard
          Mirmak, Michael (Intel Corporation, USA)

9:45    IBIS Model Validation Report
          Zheng, Qi (Fiberhome Telecommunications Technology, China)

10:15   BREAK (Refreshments)

10:30   IBIS Model Engineering for SI Analysis
          Kusunoki, Kazuhiko (Cybernet Systems, Japan)

11:00   Case Study: Spice Macromodeling for PCI Express Using
          IBIS 4.2
          Wang, Lance (Cadence Design Systems)

11:30   System-Level Timing Closure Using IBIS Models
          Katz, Barry (Signal Integrity Software (SiSoft), USA)

12:00   FREE BUFFET LUNCH (Hosted by Sponsors)
          - Vendor Tables

          12:00 - 12:45 Press Conference for IBIS Officers and Sponsors

13:30   Statistical Eye Simulation Requirements
          Huang, ChunXing (Huawei Technologies, China)

14:00   Methodologies for Multi-Gigabit Interconnect Design
          Byers, Andy, and Williams, Lawrence (Ansoft Corporation,
          USA)

14:30   System-Level SSO Simulation Techniques with Various IBIS
          Package Models
          Chitwood, Sam*, Lin, Jack, W.C.**, and Chen, Raymond Y.*
          (Sigrity, *USA and **China)

15:00   Using S-parameters for Behavioral Interconnect Modeling
          Zhu, ShunLin (ZTE Corporation, China)

15:30   BREAK (Refreshments)

15:45   JEITA EDA - WG Activity and Study of Interconnect Model
          Part-3
          Watanabe, Takeshi*, Ikeda, Hiroaki**, and JEITA (*NEC
          Electronics, **Japan Aviation Electronics, Japan)

16:15   IBIS 4.2 and VHDL-AMS for Serdes and DDR2 Analysis
          Dodd, Ian and Pratt, Gary (Mentor Graphics Corporation, USA)

16:45   IBIS Modeling of DDR2 in Conjunction with Linear Channel
          Analysis
          Dodd, Ian (Mentor Graphics Corporation, USA)

17:05   ODT, Pre-Emphasis, and Speed
          Ross, Bob (Teraspeed Consulting Group, USA)

17:20   Concluding Items

17:30   END OF IBIS SUMMIT MEETING
          - Final Vendor Tables and Teardown

------------------------------------------------------------------

LIST OF NEARBY HOTELS AND TRAVEL RULES

     Hotels in all price ranges can be found through internet searches.

     A link to the Radisson Hotel Shanghai New World is:

       http://www.radisson.com/shanghaicn_newworld

     Comply with your travel rules, such as indicated in the link
     below to China and Shanghai.  Work with your travel agent.  Notify
     us as a sign-up comment if you need assistance.  Visas, if needed,
     should fall in the visit/business category:

       http://www.travelchinaguide.com/embassy/visa.htm

-----------------------------------------------------------------


-- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Labs
121 North River Drive              13610 SW Harness Lane
Narragansett, RI 02882             Beaverton, OR 97008
401-284-1827                       503-430-1065
http://www.teraspeed.com           503-246-8048 Direct
bob@teraspeed.com

Teraspeed is a registered service mark of Teraspeed Consulting Group LLC


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Received on Mon Oct 9 07:05:45 2006

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