RE: [IBIS-Users] Dynamic behaviour of buffer

From: Muniswara Reddy Vorugu <Muniswarareddy.Vorugu_at_.....>
Date: Wed Aug 27 2008 - 22:09:50 PDT
Hi Prabhat,

I have also, faced the same problem, while modeling Low-speed mode of
USB1.1. 

Tried many options of R_fixture and C_fixture, but did not find any
improvement.

 

It looks like, we should be very lucky to get proper matching using the
VT tables.

To understand the cause of the inability of VT table methodology, look
at 

slide4-5 of the following presentation.

http://www.vhdl.org/pub/ibis/summits/jun03b/muranyi1.pdf

 

It looks like; AMS-VHDL is the only solution. 

The above presentation contains the concept of AMS-VHDL also.

 

Hope this helps you.

 

Regards,

Muniswar

 

________________________________

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Prabhat Ranjan
Sent: Thursday, August 28, 2008 12:59 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] Dynamic behaviour of buffer

 

Hello Experts,

 

I have a driver with Slope control circuit at output pin. This circuit
controls driver behaviour according to the Load on output pin.

 

IBIS model of this buffer has only R_fixture but when I am simulating
IBIS model with certain capacitive load then IBIS is not able to produce
exact SPICE behaviour.

 

My observation for mismatch is dynamic behavior of Slope control circuit
with load which I am not able to model in IBIS.

 

My question is how can I model the dynamic behaviour of Slope control
circuit in IBIS ?

 

Regards

Prabhat


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Received on Wed Aug 27 22:10:36 2008

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