RE: [IBIS-Users] question about IBIS simulation for a complete inverter

I guess it all depends on what you are trying to accomplish. Are you trying
to verify the timing of a system (prop delay of the part for instance) or
the signal integrity of a net. But IBIS does not allow you to do a complete
simulation of an inverter. The IBIS model contains no prop delay. How are
you going to cascade the IBIS input and output models?

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065

503-430-1285 FAX
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of ji xiao
Sent: Wednesday, March 17, 2010 11:35 PM
To: tom@teraspeed.com
Cc: ibis-users@eda.org
Subject: Re: [IBIS-Users] question about IBIS simulation for a complete
inverter

Dear Tom,

I agree with your statement that there is no description of the logic
function in IBIS model. Then, if I just want to compare the IBIS simulation
result of a complete inverter with its PSPICE simulation result, do I need
to simulate the output model only or cascade the IBIS input model with the
output model? It seems that the cascading way will be closer to the PSPICE
result, but I am not sure. I just directly treat the output signal of the
input model as the input signal of the output model.

Thanks and regards,

Ji Yuancheng

On Thu, Mar 18, 2010 at 12:17 AM, Tom Dagostino <tom@teraspeed.com> wrote:

Ji

Historically IBIS Signal Integrity simulators are not designed to simulate
the transfer function of the parts in the nets you are simulating, they only
concern themselves with the interaction of the I/O buffers and the
transmission line medium that is between them. There is no description of
the logic function, delay or any of the other requirements that may be
needed to generate the timing of signals from input to output in an IBIS
model. There are some timing simulators that do at least some level of
input to output simulation.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065

503-430-1285 FAX
tom@teraspeed.com
www.teraspeed.com <http://www.teraspeed.com/>

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of ji xiao

Sent: Wednesday, March 17, 2010 8:06 AM
To: ibis-users@eda.org

Subject: [IBIS-Users] question about IBIS simulation for a complete inverter

Dear Sir/Madam,

As a beginner worked with IBIS model, I met a problem about the IBIS
simulation for a complete device. Let's take an inverter as an example. If I
want to model a complete inverter including the transfer function by using
IBIS, do I just need to simulate the output model only(i.e. does the output
model contain the transfer function) ? or cascade IBIS input model with
output model?
If we need to cascade them, does that mean just to receive the output signal
of the input model as the input signal of the output model?
 
Thanks and regards,
Ji Yuancheng

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