Re: Correlating IBIS models with actual Silicon measurements

Amlan,

>From item#1, we have always used a TDR approach to measuring C_comp. In this
case, we use the Tektronix 11801B with the IPA510(Interconnect Parametric Analyzer).

The reflection profile you get from launcing a fast incident wave into
the device can be analyzed using the IPA which uses a DSP algorithm to
ret rid of multiple reflections. The IPA software allows you to get the
Z, L, C and td of the package pin. The C value will include the package as
well as the die pad. Then you need to take out the pkg number(usually available
from the pkg vendor)to get the effective C_comp for IBIS.

I have found this method to be accurate.

Regards,
Syed Huq
National Semiconductor Corp.

>
> Hi,
> We at Texas Instruments (India) are trying to develop IBIS models for one of our
> products .We have a few questions regarding the correlation of IBIS models
> (generated through simulation) with actual Silicon measurements -
>
> 1.How can we measure the "input die capacitance"in the lab ?
>
> 2.How can we measure the output rise/fall times when the chip is available
> in a plastic package ?Unless we open the package only the enable pin of
> an output buffer is available to us(along with the output pin)-but we can't
> access the input of the buffer.
> Can you send us any information regarding the correlation of IBIS
> models with Silicon ?Any URL's having such information will be very helpful
> for us.
Received on Mon Apr 27 18:11:11 1998