Anguraj and Lars, The error message results from a mismatch between your I-V tables and the "settled" starting and ending points of your V-t tables. The parser treats any mismatch between 2% and 10% as worthy of a warning. Mismatches greater than 10% will cause an error. Recall that the V-t tables should start and end at a voltage determined by the voltage division of the circuit containing R_fixture, V_fixture and the "on" resistance of your pullup or pulldown. Long before and long after transitions, your V-t tables should effectively be at DC. Therefore, you should be able to match these starting and ending DC V-t table values to the voltage-intercept of a load-line, with value of R_fixture, drawn across your I-V table. If the V-t start/end points and the load-line intercepts don't match, a warning or error will be issued. Running the simulation longer could help the issue at the *end* of the table, but may not help the mismatch at the beginning. I would not recommend changing the R_fixture of your model alone, unless you are generating new V-t tables using that new value. The process for matching is documented in the IBIS Cookbook: http://www.eda-stds.org/ibis/cookbook/cookbook-v4.pdf. Please consult this document for further detail. I would also suggest using the latest parser (ibischk4), to ensure that the error message is not the result of any previously-detected bug in ibischk3. Good luck! - Michael Mirmak Intel Corp. Chair, EIA IBIS Open Forum -----Original Message----- From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Lars Snith Sent: Wednesday, October 18, 2006 06:04 To: Anguraj.K Cc: ibis-users@server.eda.org Subject: Re: [IBIS-Users] Error message from IBIS parser. Hello Anguraj, I'm not an expert, but I have encountered this a few times. I usually try (either of) the following: 1) Run the simulation for a little bit longer 2) Increase R_fixture (or add another curve) Best regards, Lars Snith Anguraj.K wrote: > Hi IBIS Experts, > > A quick help! > > When do I get this ERROR message fron ibis parser (ibischk3)? > The [Rising Waveform] > with [R_fixture]=50 Ohms and [V_fixture_min]=1.71V > has MIN column DC endpoints of 0.86V and 1.59v, but > an equivalent load applied to the model's I-V tables yields > different voltages ( 0.82V and 1.49V), > a difference of 6.87% and 14.93%, respectively. > > Any input would be of great help! > > Thanks, > Anguraj -- Those who can, Do Those who can't, Simulate -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis <optional e-mail address, if different> | subscribe ibis-users <optional e-mail address, if different> | unsubscribe ibis <optional e-mail address, if different> | unsubscribe ibis-users <optional e-mail address, if different> | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis <optional e-mail address, if different> | subscribe ibis-users <optional e-mail address, if different> | unsubscribe ibis <optional e-mail address, if different> | unsubscribe ibis-users <optional e-mail address, if different> | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993Received on Wed Oct 18 09:34:33 2006
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