TIME AND DATE:	9:00 - 17:00, Monday, November 4, 2019
LOCATION:	Sherwood Hotel 111 Min Sheng E Road Sec.3, Taipei, Taiwan Ballroom 3F
SPONSORS:	ANSYS, Inc. Cadence Design Systems Synopsys

booklet.pdf, cover.pdf

Minutes:          m110419.pdf

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AGENDA

09:00 SIGN IN

- Vendor Tables Open at 9:00

09:30 MEETING WELCOME

Randy Wolff (Chair, IBIS Open Forum)
(Micron Technology, USA)

09:45 IBIS Chair’s Report

Randy Wolff (Micron Technology, USA)

10:05 Introducing IBIS Version 7.0

Michael Mirmak*, Randy Wolff**

(*Intel Corporation, **Micron Technology; USA)

[Presented by Randy Wolff (Micron Technology, USA)]

10:30 BREAK

- Refreshments and Vendor Tables

10:50 How to Obtain Buffer Impedance from IBIS

Lance Wang (Zuken, USA)

11:20 IBIS-AMI and COM Co-design for 25G Serdes

Nan Hou*; Amy Zhang*; Guohua Wang*; David Zhang**; Anders Ekholm**

(Ericsson, *PRC, **Sweden)

[Presented by Anders Ekholm (Ericsson, Sweden)]

12:00 FREE LUNCH (hosted by sponsors)

13:30 Innovations in DDR Memory Simulation

Stephen Slater (Keysight Technologies, USA)

[Presented by Nash Tu (Keysight Technologies, Taiwan)]

14:10 Channel Simulation Over DDR4/5 and Above

Kumar Keshavan*, Ambrish Varma*, Ken Willis*, Skipper Liang**

(Cadence Design Systems, *USA, **Taiwan)

[Presented by Skipper Liang (Cadence Design Systems, Taiwan)]

14:40 IBIS File Format Links

Bob Ross (Teraspeed Labs, USA)

[Presented by Randy Wolff (Micron Technology, USA)]

15:10 CONCLUDING ITEMS

15:15 END OF IBIS SUMMIT MEETING

15:15 BREAK

- Refreshments and Vendor Tables

15:35 VENDOR PRESENTATIONS, MODERATOR

Lance Wang (Vice-chair, IBIS Open Forum)

(Zuken, USA)

16:50 END OF VENDOR PRESENTATIONS